zynq-rs

History

pca006132 90904634cd DDR: fixed register write. Previously it writes `0x20066`, while the ps7_init set it to be `0x200066`, notice the 1 more 0. This should perform the same writes to the registers, so we do not have to apply the ps7_init in artiq_zynq.	2020-07-06 11:46:37 +08:00
..
src	DDR: fixed register write.	2020-07-06 11:46:37 +08:00
Cargo.toml	smoltcp: enable IPv6	2020-07-06 11:30:48 +08:00

pca006132 90904634cd DDR: fixed register write.

Previously it writes `0x20066`, while the ps7_init set it to be
`0x200066`, notice the 1 more 0.
This should perform the same writes to the registers, so we do not have
to apply the ps7_init in artiq_zynq.

2020-07-06 11:46:37 +08:00

src

DDR: fixed register write.

2020-07-06 11:46:37 +08:00

Cargo.toml

smoltcp: enable IPv6

2020-07-06 11:30:48 +08:00