This website requires JavaScript.
Explore
Help
Sign In
occheung
/
zynq-rs
Watch
1
Star
0
Fork
0
You've already forked zynq-rs
forked from
M-Labs/zynq-rs
Code
Issues
Pull Requests
Projects
Releases
Wiki
Activity
655
Commits
3
Branches
0
Tags
1.4
MiB
12975de2e1
Commit Graph
655 Commits
This Branch
This Branch
All Branches
Author
SHA1
Message
Date
Astro
ca9b10dce8
refactor regs macros for RO/WO/RW access
2019-05-07 00:32:45 +02:00
Astro
1e540a1175
replace #[repr(packed)] with #[repr(C)]
...
avoids warnings regarding unsafe behaviour
2019-05-07 00:05:38 +02:00
Astro
fdc6c38de6
enable_uart0(): add srcsel
2019-05-07 00:01:43 +02:00
Astro
55957eea09
regs macros
2019-05-06 23:56:53 +02:00
Astro
9b414e2408
PoC: boot, uart output in qemu
2019-05-05 14:56:23 +02:00
First
Previous
...
10
11
12
13
14
Next
Last