forked from M-Labs/zynq-rs
eth: add const MTU
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6757ceb76c
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@ -6,6 +6,9 @@ mod regs;
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pub mod rx;
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pub mod tx;
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/// Size of all the buffers
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pub const MTU: usize = 1536;
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pub struct Eth<RX, TX> {
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regs: &'static mut regs::RegisterBlock,
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rx: RX,
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@ -295,7 +298,7 @@ impl<RX, TX> Eth<RX, TX> {
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self.regs.dma_cfg.write(
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regs::DmaCfg::zeroed()
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// 1536 bytes
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.ahb_mem_rx_buf_size(0x18)
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.ahb_mem_rx_buf_size((MTU >> 6) as u8)
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// 8 KB
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.rx_pktbuf_memsz_sel(0x3)
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// 4 KB
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@ -313,10 +316,10 @@ impl<RX, TX> Eth<RX, TX> {
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);
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}
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pub fn start_rx<'rx>(self, list: &'rx mut [rx::DescEntry], rx_buffers: &'rx mut [[u8; 1536]]) -> Eth<rx::DescList<'rx>, TX> {
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pub fn start_rx<'rx>(self, rx_list: &'rx mut [rx::DescEntry], rx_buffers: &'rx mut [[u8; MTU]]) -> Eth<rx::DescList<'rx>, TX> {
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let new_self = Eth {
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regs: self.regs,
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rx: rx::DescList::new(list, rx_buffers),
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rx: rx::DescList::new(rx_list, rx_buffers),
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tx: self.tx,
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};
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let list_addr = new_self.rx.list_addr();
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@ -355,7 +358,7 @@ impl<RX, TX> Eth<RX, TX> {
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}
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impl<'rx, TX> Eth<rx::DescList<'rx>, TX> {
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pub fn recv_next(&mut self) -> Result<Option<rx::PktRef>, rx::Error> {
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pub fn recv_next<'s: 'p, 'p>(&'s mut self) -> Result<Option<rx::PktRef<'p>>, rx::Error> {
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let status = self.regs.rx_status.read();
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if status.hresp_not_ok() {
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// Clear
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@ -1,5 +1,6 @@
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use core::ops::Deref;
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use crate::{register, register_bit, register_bits, register_bits_typed, regs::*};
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use super::MTU;
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#[derive(Debug)]
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pub enum Error {
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@ -43,12 +44,12 @@ register_bit!(desc_word1, global_broadcast, 31);
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#[repr(C)]
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pub struct DescList<'a> {
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list: &'a mut [DescEntry],
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buffers: &'a mut [[u8; 1536]],
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buffers: &'a mut [[u8; MTU]],
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next: usize,
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}
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impl<'a> DescList<'a> {
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pub fn new(list: &'a mut [DescEntry], buffers: &'a mut [[u8; 1536]]) -> Self {
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pub fn new(list: &'a mut [DescEntry], buffers: &'a mut [[u8; MTU]]) -> Self {
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let last = list.len().min(buffers.len()) - 1;
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for (i, (entry, buffer)) in list.iter_mut().zip(buffers.iter_mut()).enumerate() {
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let is_last = i == last;
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