forked from M-Labs/zynq-rs
various control registers
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3238dae99f
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@ -20,6 +20,41 @@ pub enum ResponseTypeSelect {
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Legnth48Check = 0b11,
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Legnth48Check = 0b11,
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}
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}
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#[allow(unused)]
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#[repr(u8)]
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pub enum BusVoltage {
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/// 3.3V
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v33 = 0b111,
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/// 3.0V, typ.
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v30 = 0b110,
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/// 1.8V, typ.
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v18 = 0b101,
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}
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#[allow(unused)]
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#[repr(u8)]
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pub enum DmaSelect {
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sdma = 0b00,
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adma1 = 0b01,
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adma2 = 0b10,
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adma3 = 0b11,
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}
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#[allow(unused)]
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#[repr(u8)]
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/// SDCLK Frequency divisor, d(number) means baseclock divides by (number).
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pub enum SdclkFreqDivisor {
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d256 = 0x80,
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d128 = 0x40,
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d64 = 0x20,
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d32 = 0x10,
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d16 = 0x08,
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d8 = 0x04,
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d4 = 0x02,
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d2 = 0x01,
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d1 = 0x00,
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}
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#[repr(C)]
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#[repr(C)]
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pub struct RegisterBlock {
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pub struct RegisterBlock {
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pub sdma_system_address: RM<u32>,
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pub sdma_system_address: RM<u32>,
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@ -29,6 +64,10 @@ pub struct RegisterBlock {
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pub responses: [RO<u32>; 4],
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pub responses: [RO<u32>; 4],
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pub buffer: RW<u32>,
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pub buffer: RW<u32>,
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pub present_state: PresentState,
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pub present_state: PresentState,
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/// Host. power, block gap, wakeup control
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pub control: Control,
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/// Clock and timeout control, and software reset register.
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pub timing_control: TimingControl,
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}
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}
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register_at!(RegisterBlock, 0xE0100000, sd0);
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register_at!(RegisterBlock, 0xE0100000, sd0);
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@ -60,7 +99,6 @@ register_bits!(
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11
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11
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);
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);
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register!(transfer_mode_command, TransferModeCommand, RW, u32);
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register!(transfer_mode_command, TransferModeCommand, RW, u32);
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register_bits!(
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register_bits!(
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transfer_mode_command,
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transfer_mode_command,
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@ -137,7 +175,6 @@ register_bit!(
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0
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0
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);
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);
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register!(present_state, PresentState, RO, u32);
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register!(present_state, PresentState, RO, u32);
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register_bit!(
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register_bit!(
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present_state,
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present_state,
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@ -181,48 +218,131 @@ register_bit!(
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card_detected,
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card_detected,
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18
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18
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);
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);
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regsiter_bit!(
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regsiter_bit!(present_state, card_state_stable, 17);
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present_state,
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register_bit!(present_state, card_inserted, 16);
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card_state_stable,
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register_bit!(present_state, buffer_read_en, 11,);
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register_bit!(present_state, buffer_write_en, 10);
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register_bit!(present_state, read_transfer_active, 9);
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register_bit!(present_state, write_transfer_active, 8);
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register_bit!(present_state, dat_line_active, 2);
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register_bit!(present_state, command_inhibit_dat, 1);
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register_bit!(present_state, command_inhibit_cmd, 0);
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register!(control, Control, RW, u32);
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register_bit!(
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contorl,
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/// Enable wakeup event via SD card removal assertion.
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wakeup_on_removal,
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26
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);
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register_bit!(
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control,
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/// Enable wakeup event via SD card insertion assertion.
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wakeup_on_insertion,
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25
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);
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register_bit!(
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control,
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/// Enable wakeup event via card interrupt assertion.
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wakeup_on_interrupt,
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24
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);
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register_bit!(
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control,
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///Enable interrupt detection at the block gap for a multiple block transfer.
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interrupt_at_block_gap,
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19
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);
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register_bit!(
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control,
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/// Enable the use of the read wait protocol.
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read_wait_control,
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18
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);
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register_bit!(
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control,
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/// Restart a trasaction which was stopped using the stop at block gap request.
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continue_req,
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17
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17
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);
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);
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register_bit!(
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register_bit!(
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present_state,
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control,
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card_inserted,
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/// Stop executing a transaction at the next block gap.
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stop_at_block_gap_req,
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16
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16
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);
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);
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register_bits_typed!(control, bus_voltage, u8, BusVoltage, 9, 11);
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register_bit!(control, bus_power, 8);
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register_bit!(
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register_bit!(
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present_state,
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control,
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buffer_read_en,
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/// Selects source for card detection. 0 for SDCD#, 1 for card detect test level.
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11,
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card_detect_signal,
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7
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);
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);
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register_bit!(
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register_bit!(
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present_state,
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control,
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buffer_write_en,
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/// Indicates card inserted or not. Enabled when card detect signal is 1.
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10
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card_detect_test_level,
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6
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);
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);
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register_bits_typed!(control, dma_select, u8, DmaSelect, 3, 4);
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register_bit!(control, high_speed_en, 2);
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register_bit!(
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register_bit!(
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present_state,
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control,
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read_transfer_active,
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/// Select the data width of the HC. 1 for 4-bit, 0 for 1-bit.
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9
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data_width_select,
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);
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register_bit!(
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present_state,
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write_transfer_active,
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8
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);
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register_bit!(
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present_state,
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dat_line_active,
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2
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);
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register_bit!(
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present_state,
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command_inhibit_dat,
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1
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1
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);
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);
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register_bit!(
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register_bit!(
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present_state,
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control,
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command_inhibit_cmd,
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/// 1 for LED on, 0 for LED off.
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led_control,
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0
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0
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);
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);
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register!(timing_control, TimingControl, RW, u32);
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register_bit!(
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timing_control,
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/// Software reset for DAT line.
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software_reset_dat,
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26
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);
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register_bit!(
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timing_control,
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/// Software reset for CMD line.
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software_reset_cmd,
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25
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);
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register_bit!(
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timing_control,
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/// Software reset for ALL.
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software_reset_all,
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24
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);
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register_bits!(
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timing_control,
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/// Determines the interval by which DAT line time-outs are detected.
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/// Interval = TMCLK * 2^(13 + val)
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/// Note: 0b1111 is reserved.
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timeout_counter_value,
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u8,
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16,
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19
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);
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register_bits_typed!(
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timing_control,
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/// Selects the frequency divisor, thus the clock frequency for SDCLK.
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/// Choose the smallest possible divisor which results in a clock frequency
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/// that is less than or equal to the target frequency.
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sdclk_freq_divisor,
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u8,
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SdclkFreqDivisor,
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8,
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15
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);
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register_bits!(timing_control, sd_clk_en, 2);
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register_bits!(timing_control,
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/// 1 when SD clock is stable.
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/// Note that this field is read-only.
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internal_clk_stable, 1);
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register_bits!(timing_control, internal_clk_en, 0);
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