forked from M-Labs/zynq-rs
parent
2e8d291ee7
commit
688e3b4432
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@ -96,7 +96,7 @@ pub fn main_core0() {
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let x = { *SHARED.lock() };
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let x = { *SHARED.lock() };
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println!("done shared: {:08X}", x);
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println!("done shared: {:08X}", x);
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core1.stop();
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core1.reset();
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libcortex_a9::asm::dsb();
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libcortex_a9::asm::dsb();
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print!("Core1 stack [{:08X}..{:08X}]:", &core1.stack[0] as *const _ as u32, &core1.stack[core1.stack.len() - 1] as *const _ as u32);
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print!("Core1 stack [{:08X}..{:08X}]:", &core1.stack[0] as *const _ as u32, &core1.stack[core1.stack.len() - 1] as *const _ as u32);
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@ -109,10 +109,13 @@ pub struct Core1<S: AsMut<[u32]>> {
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}
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}
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impl<S: AsMut<[u32]>> Core1<S> {
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impl<S: AsMut<[u32]>> Core1<S> {
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pub fn stop(&self) {
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pub fn reset(&self) {
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unsafe {
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CORE1_STACK.set(0);
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}
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slcr::RegisterBlock::unlocked(|slcr| {
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slcr::RegisterBlock::unlocked(|slcr| {
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slcr.a9_cpu_rst_ctrl.modify(|_, w| w.a9_rst1(true));
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slcr.a9_cpu_rst_ctrl.modify(|_, w| w.a9_rst1(true));
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slcr.a9_cpu_rst_ctrl.modify(|_, w| w.a9_clkstop1(true));
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slcr.a9_cpu_rst_ctrl.modify(|_, w| w.a9_rst1(false));
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slcr.a9_cpu_rst_ctrl.modify(|_, w| w.a9_rst1(false));
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});
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});
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}
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}
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@ -125,7 +128,11 @@ impl<S: AsMut<[u32]>> Core1<S> {
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let mut core = Core1 { stack };
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let mut core = Core1 { stack };
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// reset and stop (safe to repeat)
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// reset and stop (safe to repeat)
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core.stop();
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slcr::RegisterBlock::unlocked(|slcr| {
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slcr.a9_cpu_rst_ctrl.modify(|_, w| w.a9_rst1(true));
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slcr.a9_cpu_rst_ctrl.modify(|_, w| w.a9_clkstop1(true));
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slcr.a9_cpu_rst_ctrl.modify(|_, w| w.a9_rst1(false));
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});
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let stack = core.stack.as_mut();
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let stack = core.stack.as_mut();
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let stack_start = &mut stack[stack.len() - 1];
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let stack_start = &mut stack[stack.len() - 1];
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