occheung
/
zynq-rs
forked from M-Labs/zynq-rs
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

libboard_zc706: move main.rs into experiments bin crate

This commit is contained in:
Astro 2019-12-18 00:06:10 +01:00
parent cf1983e543
commit 4439a64974
8 changed files with 69 additions and 208 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
Cargo.lock generated
View File

@ -100,6 +100,17 @@ dependencies = [
"vcell 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)", "vcell 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
] ]
[[package]]
name = "zc706-experiments"
version = "0.0.0"
dependencies = [
"libboard_zc706 0.0.0",
"libboard_zynq 0.0.0",
"libcortex_a9 0.0.0",
"libregister 0.0.0",
"smoltcp 0.5.0 (git+https://github.com/m-labs/smoltcp.git?rev=8eb01aca364aefe5f823d68d552d62c76c9be4a3)",
]
[metadata] [metadata]
"checksum bit_field 0.10.0 (registry+https://github.com/rust-lang/crates.io-index)" = "a165d606cf084741d4ac3a28fb6e9b1eb0bd31f6cd999098cfddb0b2ab381dc0" "checksum bit_field 0.10.0 (registry+https://github.com/rust-lang/crates.io-index)" = "a165d606cf084741d4ac3a28fb6e9b1eb0bd31f6cd999098cfddb0b2ab381dc0"
"checksum bitflags 1.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "3d155346769a6855b86399e9bc3814ab343cd3d62c7e985113d46a0ec3c281fd" "checksum bitflags 1.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "3d155346769a6855b86399e9bc3814ab343cd3d62c7e985113d46a0ec3c281fd"

6
Cargo.toml
View File

@ -1,5 +1,9 @@
[workspace] [workspace]
members = ["libregister", "libcortex_a9", "libboard_zynq", "libboard_zc706"] members = [
"libregister", "libcortex_a9",
"libboard_zynq", "libboard_zc706",
"experiments",
]
[profile.dev] [profile.dev]
panic = "abort" panic = "abort"

22
experiments/Cargo.toml Normal file
View File

@ -0,0 +1,22 @@
[package]
name = "zc706-experiments"
version = "0.0.0"
authors = ["Astro <astro@spaceboyz.net>"]
edition = "2018"
[features]
target_zc706 = []
target_cora_z7_10 = []
default = ["target_zc706"]
[dependencies]
libregister = { path = "../libregister" }
libcortex_a9 = { path = "../libcortex_a9" }
libboard_zynq = { path = "../libboard_zynq" }
libboard_zc706 = { path = "../libboard_zc706" }
[dependencies.smoltcp]
git = "https://github.com/m-labs/smoltcp.git"
rev = "8eb01aca364aefe5f823d68d552d62c76c9be4a3"
features = ["ethernet", "proto-ipv4", "socket-tcp"]
default-features = false

33
libboard_zc706/src/main.rs → experiments/src/main.rs
View File

@ -1,33 +1,25 @@
#![no_std] #![no_std]
#![no_main] #![no_main]
#![feature(naked_functions)]
#![feature(alloc_error_handler)]
#![feature(panic_info_message)]
// TODO: disallow unused/dead_code when code moves into a lib crate
#![allow(dead_code)]
extern crate alloc;
use alloc::{vec, vec::Vec};
use core::mem::transmute; use core::mem::transmute;
use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr};
use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder};
use smoltcp::time::Instant;
use smoltcp::socket::SocketSet;
use smoltcp::socket::{TcpSocket, TcpSocketBuffer};
use libboard_zynq::{print, println, self as zynq};
mod boot;
mod abort;
mod panic;
mod ram;
use libcortex_a9::mutex::Mutex; use libcortex_a9::mutex::Mutex;
use libboard_zynq::{print, println, self as zynq};
use libboard_zc706::{
ram, alloc::{vec, vec::Vec},
boot,
smoltcp::wire::{EthernetAddress, IpAddress, IpCidr},
smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder},
smoltcp::time::Instant,
smoltcp::socket::SocketSet,
smoltcp::socket::{TcpSocket, TcpSocketBuffer},
};
const HWADDR: [u8; 6] = [0, 0x23, 0xde, 0xea, 0xbe, 0xef]; const HWADDR: [u8; 6] = [0, 0x23, 0xde, 0xea, 0xbe, 0xef];
static mut STACK_CORE1: [u32; 512] = [0; 512]; static mut STACK_CORE1: [u32; 512] = [0; 512];
pub fn main() { #[no_mangle]
pub fn main_core0() {
// zynq::clocks::CpuClocks::enable_io(1_250_000_000); // zynq::clocks::CpuClocks::enable_io(1_250_000_000);
println!("\nzc706 main"); println!("\nzc706 main");
{ {
@ -202,6 +194,7 @@ pub fn main() {
static SHARED: Mutex<u32> = Mutex::new(0); static SHARED: Mutex<u32> = Mutex::new(0);
static DONE: Mutex<bool> = Mutex::new(false); static DONE: Mutex<bool> = Mutex::new(false);
#[no_mangle]
pub fn main_core1() { pub fn main_core1() {
println!("Hello from core1!"); println!("Hello from core1!");
for _ in 0..0x1000000 { for _ in 0..0x1000000 {

1
libboard_zc706/Cargo.toml
View File

@ -5,6 +5,7 @@ authors = ["Astro <astro@spaceboyz.net>"]
edition = "2018" edition = "2018"
[features] [features]
# TODO: propagate to libboard_zynq
target_zc706 = [] target_zc706 = []
target_cora_z7_10 = [] target_cora_z7_10 = []
default = ["target_zc706"] default = ["target_zc706"]

6
libboard_zc706/src/boot.rs
View File

@ -10,6 +10,8 @@ extern "C" {
static mut __bss_start: u32; static mut __bss_start: u32;
static mut __bss_end: u32; static mut __bss_end: u32;
static mut __stack_start: u32; static mut __stack_start: u32;
fn main_core0();
fn main_core1();
} }
/// `0` means: wait for initialization by core0 /// `0` means: wait for initialization by core0
@ -57,7 +59,7 @@ unsafe fn boot_core0() -> ! {
asm::dmb(); asm::dmb();
asm::dsb(); asm::dsb();
crate::main(); main_core0();
panic!("return from main"); panic!("return from main");
}); });
} }
@ -77,7 +79,7 @@ unsafe fn boot_core1() -> ! {
asm::dmb(); asm::dmb();
asm::dsb(); asm::dsb();
crate::main_core1(); main_core1();
panic!("return from main_core1"); panic!("return from main_core1");
}); });
} }

13
libboard_zc706/src/lib.rs Normal file
View File

@ -0,0 +1,13 @@
#![no_std]
#![feature(naked_functions)]
#![feature(alloc_error_handler)]
#![feature(panic_info_message)]
pub extern crate alloc;
pub mod boot;
mod abort;
mod panic;
pub mod ram;
pub use smoltcp;

185
libboard_zc706/src/main.rs.orig
View File

@ -1,185 +0,0 @@
#![no_std]
#![no_main]
#![feature(asm)]
#![feature(global_asm)]
#![feature(naked_functions)]
#![feature(compiler_builtins_lib)]
#![feature(never_type)]
// TODO: disallow unused/dead_code when code moves into a lib crate
#![allow(dead_code)]
use core::mem::{uninitialized, transmute};
use r0::zero_bss;
use compiler_builtins as _;
use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr};
use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder, EthernetInterface};
use smoltcp::time::Instant;
use smoltcp::socket::SocketSet;
mod regs;
mod cortex_a9;
mod clocks;
mod slcr;
mod uart;
mod stdio;
mod eth;
use crate::regs::{RegisterR, RegisterW};
use crate::cortex_a9::{asm, regs::*, mmu};
extern "C" {
static mut __bss_start: u32;
static mut __bss_end: u32;
static mut __stack_start: u32;
}
#[link_section = ".text.boot"]
#[no_mangle]
#[naked]
pub unsafe extern "C" fn _boot_cores() -> ! {
const CORE_MASK: u32 = 0x3;
match MPIDR.read() & CORE_MASK {
0 => {
SP.write(&mut __stack_start as *mut _ as u32);
boot_core0();
}
_ => loop {
// if not core0, infinitely wait for events
asm::wfe();
},
}
}
#[naked]
#[inline(never)]
unsafe fn boot_core0() -> ! {
l1_cache_init();
zero_bss(&mut __bss_start, &mut __bss_end);
let mmu_table = mmu::L1Table::get()
.setup_flat_layout();
mmu::with_mmu(mmu_table, || {
main();
panic!("return from main");
});
}
fn l1_cache_init() {
// Invalidate TLBs
tlbiall();
// Invalidate I-Cache
iciallu();
// Invalidate Branch Predictor Array
bpiall();
// Invalidate D-Cache
dccisw();
}
const HWADDR: [u8; 6] = [0, 0x23, 0xde, 0xea, 0xbe, 0xef];
fn main() {
println!("Main.");
let clocks = clocks::CpuClocks::get();
println!("Clocks: {:?}", clocks);
println!("CPU speeds: {}/{}/{}/{} MHz",
clocks.cpu_6x4x() / 1_000_000,
clocks.cpu_3x2x() / 1_000_000,
clocks.cpu_2x() / 1_000_000,
clocks.cpu_1x() / 1_000_000);
let eth = eth::Eth::default(HWADDR.clone());
println!("Eth on");
const RX_LEN: usize = 2;
let mut rx_descs: [eth::rx::DescEntry; RX_LEN] = unsafe { uninitialized() };
let mut rx_buffers = [[0u8; eth::MTU]; RX_LEN];
// Number of transmission buffers (minimum is two because with
// one, duplicate packet transmission occurs)
const TX_LEN: usize = 2;
let mut tx_descs: [eth::tx::DescEntry; TX_LEN] = unsafe { uninitialized() };
let mut tx_buffers = [[0u8; eth::MTU]; TX_LEN];
let eth = eth.start_rx(&mut rx_descs, &mut rx_buffers);
//let mut eth = eth.start_tx(&mut tx_descs, &mut tx_buffers);
let mut eth = eth.start_tx(
// HACK
unsafe { transmute(tx_descs.as_mut()) },
unsafe { transmute(tx_buffers.as_mut()) },
);
let ethernet_addr = EthernetAddress(HWADDR);
// IP stack
let local_addr = IpAddress::v4(10, 0, 0, 1);
let mut ip_addrs = [IpCidr::new(local_addr, 24)];
let mut neighbor_storage = [None; 16];
let neighbor_cache = NeighborCache::new(&mut neighbor_storage[..]);
let mut iface = EthernetInterfaceBuilder::new(&mut eth)
.ethernet_addr(ethernet_addr)
.ip_addrs(&mut ip_addrs[..])
.neighbor_cache(neighbor_cache)
.finalize();
let mut sockets_storage = [
None, None, None, None,
None, None, None, None
];
let mut sockets = SocketSet::new(&mut sockets_storage[..]);
let mut time = 0u32;
loop {
time += 1;
let timestamp = Instant::from_millis(time.into());
match iface.poll(&mut sockets, timestamp) {
Ok(_) => {},
Err(e) => {
println!("poll error: {}", e);
}
}
// match eth.recv_next() {
// Ok(Some(pkt)) => {
// print!("eth: rx {} bytes", pkt.len());
// for b in pkt.iter() {
// print!(" {:02X}", b);
// }
// println!("");
// }
// Ok(None) => {}
// Err(e) => {
// println!("eth rx error: {:?}", e);
// }
// }
// match eth.send(512) {
// Some(mut pkt) => {
// let mut x = 0;
// for b in pkt.iter_mut() {
// *b = x;
// x += 1;
// }
// println!("eth tx {} bytes", pkt.len());
// }
// None => println!("eth tx shortage"),
// }
}
}
#[panic_handler]
fn panic(info: &core::panic::PanicInfo) -> ! {
println!("\nPanic: {}", info);
slcr::RegisterBlock::unlocked(|slcr| slcr.soft_reset());
loop {}
}
#[no_mangle]
pub unsafe extern "C" fn PrefetchAbort() {
println!("PrefetchAbort");
loop {}
}
#[no_mangle]
pub unsafe extern "C" fn DataAbort() {
println!("DataAbort");
loop {}
}