artiq/soc/targets
2015-06-22 19:03:00 -06:00
..
artiq_kc705.py soc: increase DDS output FIFO sizes 2015-06-21 08:40:10 -06:00
artiq_pipistrello.py pipistrello: run at 83+1/3 MHz, cleanup CRG 2015-06-22 19:03:00 -06:00