artiq/artiq/gateware
Robert Jordens c63fa46430 Merge branch 'phaser2'
* phaser2: (157 commits)
  sawg/hbf: tweak pipeline for timing
  fir: register multiplier output
  conda/phaser: build-depend on numpy
  sawg: reduce coefficient width
  sawg: fix latency
  test/fir: needs mpl. don't run by default
  test/sawg: patch spline
  sawg: use ParallelHBFCascade to AA [WIP]
  fir: add ParallelHBFCascade
  fir: add ParallelFIR and test
  gateware/dsp: add FIR and test
  README_PHASER: update
  sawg: documentation
  sawg: extract spline
  sawg: document
  sawg: demo_2tone
  sawg: round to int64
  gateware/phaser -> gateware/ad9154_fmc_ebz
  phaser: fix typo
  sawg: merge set/set64
  ...
2016-12-12 17:31:39 +01:00
..
amp gateware: rewrite mailbox to use bits_for. 2016-11-01 06:28:43 +00:00
drtio drtio: reset more local state 2016-12-12 18:48:10 +08:00
dsp sawg/hbf: tweak pipeline for timing 2016-12-08 17:00:53 +01:00
rtio Merge branch 'phaser2' 2016-12-12 17:31:39 +01:00
targets Merge branch 'phaser2' 2016-12-12 17:31:39 +01:00
__init__.py artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
ad9xxx.py Remove last vestiges of nist_qc1. 2016-11-21 15:36:22 +00:00
ad9154_fmc_ebz.py Merge remote-tracking branch 'm-labs/phaser2' into phaser2 2016-12-02 14:11:56 +01:00
nist_clock.py gateware/nist_clock: increase DDS bus drive strength. Closes #468 2016-06-07 11:08:19 -04:00
nist_qc2.py qc2: swap SPI/TTL, all TTL lines are now In+Out compatible 2016-05-19 10:42:03 +08:00
soc.py Merge branch 'master' into drtio 2016-11-06 00:13:32 +08:00
spi.py gateware/spi: fix import 2016-10-17 14:47:19 +08:00