forked from M-Labs/artiq
100 lines
3.6 KiB
Python
100 lines
3.6 KiB
Python
from migen import *
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from migen.genlib.cdc import MultiReg, PulseSynchronizer
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from migen.genlib.fsm import FSM
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from artiq.gateware.rtio import rtlink
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from artiq.gateware.grabber import deserializer_7series
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from artiq.gateware.grabber.core import *
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__all__ = ["Grabber"]
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class Synchronizer(Module):
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def __init__(self, roi_engines):
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counts_in = [roi_engine.out.count for roi_engine in roi_engines]
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# This assumes all ROI engines update at the same time.
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self.update = Signal()
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# stays valid until the next frame after self.update is pulsed.
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self.counts = [Signal.like(count) for count in counts_in]
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# # #
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for count in counts_in:
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count.attr.add("no_retiming")
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self.specials += [MultiReg(i, o, "rtio") for i, o in zip(counts_in, self.counts)]
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ps = PulseSynchronizer("cl", "rtio")
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self.submodules += ps
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self.comb += ps.i.eq(roi_engines[0].out.update)
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self.sync.rtio += self.update.eq(ps.o)
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class Serializer(Module):
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def __init__(self, update, counts, rtlink_i):
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self.gate = Signal(len(counts))
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# # #
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gate = Signal(len(counts))
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sentinel = 2**(len(rtlink_i.data) - 1)
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fsm = ClockDomainsRenamer("rio")(FSM())
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self.submodules += fsm
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fsm.act("INIT",
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rtlink_i.data.eq(sentinel),
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If(update & (self.gate != 0),
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NextValue(gate, self.gate),
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rtlink_i.stb.eq(1),
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NextState(0)
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)
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)
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for n, count in enumerate(counts):
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last = n == len(counts)-1
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fsm.act(n,
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rtlink_i.data.eq(count),
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rtlink_i.stb.eq(gate[n]),
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NextState("INIT" if last else n+1)
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)
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class Grabber(Module):
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def __init__(self, pins, roi_engine_count=16, res_width=12, count_shift=0):
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self.config = rtlink.Interface(
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rtlink.OInterface(res_width,
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bits_for(4*roi_engine_count-1)))
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self.gate_data = rtlink.Interface(
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rtlink.OInterface(roi_engine_count),
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rtlink.IInterface(1+ROI.count_len(res_width, count_shift),
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timestamped=False))
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self.submodules.deserializer = deserializer_7series.Deserializer(pins)
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self.submodules.frequency_counter = FrequencyCounter()
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self.submodules.parser = Parser(res_width)
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self.comb += self.parser.cl.eq(self.deserializer.q)
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self.roi_engines = [ROI(self.parser.pix, count_shift) for _ in range(roi_engine_count)]
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self.submodules += self.roi_engines
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self.submodules.synchronizer = Synchronizer(self.roi_engines)
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self.submodules.serializer = Serializer(self.synchronizer.update, self.synchronizer.counts,
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self.gate_data.i)
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for n, roi_engine in enumerate(self.roi_engines):
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for offset, target in enumerate([roi_engine.cfg.x0, roi_engine.cfg.y0,
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roi_engine.cfg.x1, roi_engine.cfg.y1]):
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roi_boundary = Signal.like(target)
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roi_boundary.attr.add("no_retiming")
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self.sync.rtio += If(self.config.o.stb & (self.config.o.address == 4*n+offset),
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roi_boundary.eq(self.config.o.data))
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self.specials += MultiReg(roi_boundary, target, "cl")
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self.sync.rio += If(self.gate_data.o.stb,
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self.serializer.gate.eq(self.gate_data.o.data))
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def get_csrs(self):
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return (
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self.deserializer.get_csrs() +
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self.frequency_counter.get_csrs() +
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self.parser.get_csrs())
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