Robert Jördens c2fe9a08ae gateware.spi: delay only writes to data register, update doc		2016-03-01 14:14:38 +01:00
..
amp	Implement core device storage (fixes #219).	2016-01-10 13:04:55 +00:00
rtio	Revert "gateware/rt2wb: only input when active"	2016-02-29 16:44:11 +01:00
targets	nist_clock: disable spi1/2	2016-03-01 01:52:46 +01:00
__init__.py	artiqlib -> artiq.gateware	2015-03-08 11:00:24 +01:00
ad9xxx.py	gateware,runtime: use new migen/misoc	2015-11-04 00:35:03 +08:00
nist_clock.py	nist_clock: rename spi*.ce to spi*.cs_n	2016-02-29 22:21:18 +01:00
nist_qc1.py	gateware,runtime: use new migen/misoc	2015-11-04 00:35:03 +08:00
nist_qc2.py	gateware: clean up and integrate QC2 modifications from Daniel	2016-01-20 21:17:19 -05:00
soc.py	gateware/soc: use new SDRAM API call	2015-12-16 14:59:35 +08:00
spi.py	gateware.spi: delay only writes to data register, update doc	2016-03-01 14:14:38 +01:00