This website requires JavaScript.
Explore
Help
Sign In
occheung
/
artiq
Watch
1
Star
0
Fork
0
You've already forked artiq
forked from
M-Labs/artiq
Code
Pull Requests
Activity
619
Commits
14
Branches
35
Tags
23
MiB
f94aa49276
Commit Graph
4 Commits
Author
SHA1
Message
Date
Sebastien Bourdeauducq
c591f1a74d
targets/ARTIQMiniSoC: support dynamic switching of RTIO clock to XTRIG
2014-12-01 18:53:29 +08:00
Sebastien Bourdeauducq
99d530e498
targets/ARTIQMiniSoC: remove 2 TTL channels to make room in FPGA
2014-12-01 17:31:35 +08:00
Sebastien Bourdeauducq
1f6441948d
more TTL channels and larger input FIFOs on Papilio Pro
2014-11-30 15:50:57 +08:00
Sebastien Bourdeauducq
8d59f843fb
doc/manual: add FPGA board info and TTL line assignments
2014-11-21 16:39:22 -08:00