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6368 Commits

Author SHA1 Message Date
whitequark ed6d927f6c Improve Python 3.7 compatibility. 
async is now a full (non-contextual) keyword.

There are two more instances:
   - artiq/frontend/artiq_client.py
   - artiq/devices/thorlabs_tcube/driver.py

It is not immediately clear how to fix those, so they are left for
later work.
 2019-01-13 11:53:58 +08:00
David Nadlinger cc811429f4 coredevice.ad9910: Fix phase tracking ref_time passing 
This is difficult to test without hardware mocks or some
form of phase readback, but the symptom was that e.g.
`self.dds.set(…, ref_time=now_mu() - 1)` would fail
periodically, that is, whenever bit 32 of the timestamp
would be set (which would be turned into the sign bit).

This is a fairly sinister issue, and is probably a compiler
bug of some sort (either accepts-invalid or wrong type inference).
 2019-01-12 17:24:03 +00:00
Robert Jördens 5b2e7cb7f3 test_ad9910: relax tests 
* tune_sync_delay: the opposite IO_UPDATE to SYNC_CLK alignment may not be perfectly
mis-aligned
* set_mu_speed: seems to be slower on the buildbot

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-09 18:34:33 +01:00
Robert Jördens 41a816fd16 ad9910: fix RTIO fine timestamp nudging 
Previously the TSC was truncated to an even coarse RTIO periods before doing
the setting SPI xfer. Afterwards the the IO update pulse would introduce
at least one but less than two RTIO cycles. Ultimately the RTIO TSC was
truncated again to even. If the SPI xfer takes an odd number of RTIO
periods, then a subsequent xfer would collide.

close #1229

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-09 18:34:20 +01:00
Robert Jördens 51239ebdb6 ad9910: add more slack in tune_sync_delay 
close #1235

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-09 18:34:03 +01:00
Sebastien Bourdeauducq 0303267d7e satman: wait for CPLL/QPLL lock after setting drtio_transceiver::stable_clkin 2019-01-07 17:09:35 +08:00
Sebastien Bourdeauducq 0ec01790fe firmware: fix not(has_spiflash) build 2019-01-05 23:41:50 +08:00
Sebastien Bourdeauducq f23d4e2762 update copyright year 2019-01-05 15:03:30 +08:00
Sebastien Bourdeauducq 6020b9c2f1 manual: update firmware/gateware build/flashing instructions. Closes #1223 2019-01-05 12:39:07 +08:00
Drew 9b081737d4 artiq_flash: change docs from old `-m` arg to `-V` (#1224) (#1227) 
`-m` argument is deprecated. Changed to newer `-V` argument
Closes #1224

Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
 2019-01-05 10:23:47 +08:00
Drew Risinger 17fa5026a5 pyon: fix grammar in module docstring. 
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
 2019-01-05 10:23:47 +08:00
Drew 3312a033eb Docs: instructions to check if in plugdev group 2019-01-05 10:23:47 +08:00
Sebastien Bourdeauducq a53065ffc8 manual: move to correct directory for building rust crates. Closes #1222 2018-12-21 10:37:22 +08:00
Drew 8eee5dd414 tdr.py: typo (#1220) 2018-12-19 02:47:34 +08:00
Sebastien Bourdeauducq 371dda4a16 sync_struct: handle TimeoutError as subscriber disconnection. Closes #1215 2018-12-13 07:15:07 +08:00
Robert Jördens b1ea02ddf0 eem: name the servo submodule 
This allows the migen namer to derive names for the ADC return clock
domain in the case of multiple SUServos

close #1201

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-12-11 11:37:36 +01:00
Sebastien Bourdeauducq e4ddfb303c Revert "firmware/ksupport: Update `cfg(not(has_rtio))` stub signatures" 
release-4 does not have DRTIO switching nor the new RTIO CSR interface.

This reverts commit a7d7e91188.
 2018-12-11 16:47:34 +08:00
David Nadlinger a7d7e91188 firmware/ksupport: Update `cfg(not(has_rtio))` stub signatures 
This fixes up 8caea0e6d3,
but it is unclear whether anyone even uses a `not(has_rtio)`
configuration at this point.
 2018-12-11 09:30:49 +01:00
Kaifeng 34d0f592f1 kasli_tester: add support for windows platform. (#1204) 2018-12-05 21:07:55 +08:00
Sebastien Bourdeauducq 7358262ab3 test_loopback_gate_timing: fix lat_offset 2018-12-02 20:52:54 +08:00
Sebastien Bourdeauducq 6fdfd6103f ctlmgr: do not raise exceptions in Controllers.__setitem__. Closes #1198 2018-12-01 18:06:53 +08:00
Sebastien Bourdeauducq e3624ca86d test_loopback_gate_timing: print input timing for debugging 2018-12-01 18:06:22 +08:00
Sebastien Bourdeauducq d6cc10b43c grabber: work around windows numpy int peculiarity (same as a81c12de9) 2018-11-30 18:41:31 +08:00
Sebastien Bourdeauducq 35f331f82c language: fix syscall arg handling 2018-11-30 17:59:42 +08:00
Sebastien Bourdeauducq a3c5cdeb86 manual/drtio: update output internal description (SED, 'destination' switching terminology) 2018-11-26 18:36:59 +08:00
Robert Jördens cc61ee9139 urukul: work around windows numpy int peculiarity 
"OverflowError: Python int too large to convert to C long" otherwise

opticlock#74

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-25 16:58:10 +01:00
Sebastien Bourdeauducq 74371399de RELEASE_NOTES: remove ARTIQ-5 entry 2018-11-20 18:39:27 +08:00
Sebastien Bourdeauducq bf50dcf76d conda: use misoc release 2018-11-20 17:15:53 +08:00
Sebastien Bourdeauducq 8f9858be4c ad9914: remove automatic continuous phase compensation (like Urukul) 2018-11-19 22:00:20 +08:00
Sebastien Bourdeauducq 22a223bf82 examples/master: clean up remnants of early urukul tests 2018-11-19 21:42:41 +08:00
Sebastien Bourdeauducq f5befba5c9 conda: bump misoc (attempt to WA conda problem) 2018-11-19 13:24:28 +08:00
Sebastien Bourdeauducq b5cdb1c1e0 try to work around conda problem 2018-11-18 22:32:17 +08:00
Sebastien Bourdeauducq a3e0b1c5b4 ad9914,spi2: add warnings about driver state and DMA. Closes #1113 2018-11-17 22:10:20 +08:00
Sebastien Bourdeauducq 78d4b3a7da gateware/targets: expose variant lists 
This allows writing scripts that build all variants.
 2018-11-17 22:10:20 +08:00
Sebastien Bourdeauducq 69e699c7bd ttl: compensate for SED latency in input gating 
Closes #1137
 2018-11-17 22:10:20 +08:00
Robert Jördens 3ad68f65c5 urukul: make get_att_mu() not alter state 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-16 14:56:26 +00:00
Robert Jördens d1eee7c0ea ad9910: ensure sync is driven when required 
close #1194

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-16 13:21:01 +00:00
Sebastien Bourdeauducq de9d21ffc8 nix: use fetchFromGitHub for llvmlite 2018-11-16 15:14:20 +08:00
Sebastien Bourdeauducq d3483c1d26 kasli: fix SDRAM read delay reset/wrap issue. Closes #1149 2018-11-15 19:40:35 +08:00
Robert Jördens 494ffca4d3 gui,scan: add CenterScan Scannable variant 
* parametrized by center/span/step instead of
  start/stop/npoints which is more convenient in some applications
* no scan widget support so far

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-15 13:30:43 +08:00
Robert Jördens f77a75ab17 test_ad9910: robustify w.r.t. profile synchronization 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-14 08:42:27 +01:00
Robert Jördens c3178c2cab ad9910: profile support 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-14 08:30:28 +01:00
Robert Jördens d0cadfeb4b ad9910: more idiomatic register names 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-14 07:55:01 +01:00
Robert Jördens a52d1be140 urukul: expose PROFILE setting 
* add documentation
* add unittest

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-14 07:43:56 +01:00
Robert Jördens 2af6edb8f5 eem: fix reset/sync in suservo 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-13 13:00:54 +00:00
whitequark 248c1cf7dc firmware: fix another TOCTTOU race in sync/async RPC code. 2018-11-13 00:58:20 +08:00
whitequark 68aad3e482 firmware: fix TOCTTOU race in sync/async RPC code. 
Before this commit, the main loop in session code was laid like:

  1. process_kern_queued_rpc
  2. process_host_message
  3. process_kern_message

If a host message (such as an RPC reply) caused the kernel to exit,
then any async RPCs would not complete, since RunFinished immediately
shuts down the kernel.

Fix this by reordering 1 and 2.
 2018-11-13 00:57:09 +08:00
Robert Jördens a4997c56cf ad9910: simplify edge detection logic 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-09 18:54:34 +00:00
Robert Jördens e927551827 manual: add highfinesse-net port 2018-11-09 19:39:25 +01:00
Robert Jördens 14b6b63916 ad9910: rewire io_delay tuning 
This now reliably locates the SYNC_CLK-IO_UPDATE edge by doing two
scans at different delays between start and stop IO_UPDATE.
It also works well when one delay is very close to the edge.
And it correctly identifies which (start or stop) pulse hit or crossed
the SYNC_CLK edge.

for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-09 18:38:27 +00:00