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bea1182aca
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sim/devices/core: adapt to _ARTIQEmbeddedInfo
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2015-12-27 11:56:01 +08:00 |
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b5253e1353
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coredevice/analyzer: decode log messages
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2015-12-27 01:28:34 +08:00 |
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048dcbee92
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runtime/rtio: reverse char ordering in log messages
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2015-12-27 01:07:18 +08:00 |
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50a463a6fd
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runtime: support for RTIO logging
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2015-12-26 22:44:50 +08:00 |
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ba6c527819
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gateware/targets: add RTIO log channels
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2015-12-26 22:44:01 +08:00 |
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080752092c
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gateware/rtio: add LogChannel
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2015-12-26 22:43:28 +08:00 |
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9ba8dfbf23
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gateware/rtio/core: avoid potential python bug
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2015-12-26 22:11:57 +08:00 |
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24fa74a8ab
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coredevice/analyzer: support TTL clockgen
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2015-12-26 21:51:37 +08:00 |
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532204e5ff
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examples/device_db: add clockgen
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2015-12-26 21:50:48 +08:00 |
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1c36ae0672
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coredevice/analyzer: support TTL inputs
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2015-12-26 21:24:53 +08:00 |
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7eb4067477
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test/coredevice/analyzer: test TTL input mode
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2015-12-26 21:10:19 +08:00 |
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whitequark
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82ec76af3e
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compiler.types: fix TFunction internal field order (closes #208).
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2015-12-26 18:08:51 +08:00 |
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a871194ee4
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coredevice/analyzer: prefix channel names with their types
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2015-12-26 17:47:53 +08:00 |
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2b70fa14a6
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coredevice/analyzer: update rtio_slack on output messages only
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2015-12-26 17:47:08 +08:00 |
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whitequark
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b931096ec3
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transforms.artiq_ir_generator: fix While codegen (closes #207).
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2015-12-26 17:24:05 +08:00 |
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whitequark
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502e570e86
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compiler: embed host exception constructors as such (fixes #204).
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2015-12-26 03:17:29 +08:00 |
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whitequark
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8051fe9592
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Commit missing parts of 082e9e20dd.
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2015-12-26 03:16:50 +08:00 |
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whitequark
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082e9e20dd
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compiler: do not associate SSA values with iodelay even when inlining.
Fixes #201.
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2015-12-25 15:02:33 +08:00 |
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whitequark
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33c3b3377e
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ir: keep loc when copying.
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2015-12-25 14:59:28 +08:00 |
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whitequark
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690b2fd034
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transforms.artiq_ir_generator: fix optarg codegen (closes #205).
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2015-12-25 12:40:45 +08:00 |
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cd8eccfd46
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coredevice/analyzer: add rtio_slack channel
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2015-12-25 00:40:47 +08:00 |
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7475b3813e
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test/coredevice: PEP8
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2015-12-24 19:26:42 +08:00 |
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bf1a3a5b8f
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test/coredevice: add analyzer unittest
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2015-12-24 19:25:29 +08:00 |
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5f3b69dd19
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frontend/coreconfig: simplify action names
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2015-12-24 18:54:23 +08:00 |
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179c50480f
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frontend: split coretool into coreconfig, corelog and coreanalyzer
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2015-12-24 18:51:11 +08:00 |
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e41e2c088d
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analyzer: encapsulate decoded dump, get onehot sel from header
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2015-12-24 00:31:21 +08:00 |
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4be5df9802
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coredevice/analyzer: DDS decoding
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2015-12-23 18:57:53 +08:00 |
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58d0e2c0b8
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coredevice/analyzer: log TTL decoding in debug mode
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2015-12-23 18:56:23 +08:00 |
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e4d73c0302
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artiq/coredevice/dds: fix dds_set signature
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2015-12-23 17:25:31 +08:00 |
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e4233d706d
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examples/speed_benchmark: fix scheduler arguments
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2015-12-22 17:13:09 +08:00 |
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b4b0dcc5d1
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test/coredevice/rtio: remove obsolete functions
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2015-12-22 12:11:13 +08:00 |
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f6522922f8
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coredevice/exceptions: PEP8
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2015-12-22 12:03:11 +08:00 |
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23355d8eff
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coredevice: restore RTIOCollisionError
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2015-12-22 11:59:18 +08:00 |
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fc299ca918
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language/environment: disable processors by default
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2015-12-22 11:45:34 +08:00 |
|
whitequark
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a250b5da21
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language.core: implement round(value, width) (fixes #203).
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2015-12-22 11:26:49 +08:00 |
|
whitequark
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25188f0ca9
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transforms.interleaver: correctly handle degenerate with parallel: blocks.
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2015-12-21 21:32:48 +08:00 |
|
whitequark
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ac5c86bfdc
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artiq_compile: add missing import.
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2015-12-21 21:15:18 +08:00 |
|
whitequark
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f957be4e6f
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transforms.llvm_ir_generator: handle loop instruction (fixes #202).
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2015-12-21 21:12:17 +08:00 |
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007a7170e1
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analyzer: report DDS channel number
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2015-12-21 18:37:53 +08:00 |
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8691f69a3c
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gateware/rtio/analyzer: suppress spurious initial reset messages
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2015-12-21 18:32:08 +08:00 |
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e87436fc03
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coredevice/analyzer: remove zero-timestamp msg filtering (now unnecessary)
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2015-12-21 11:15:58 +08:00 |
|
whitequark
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d1a5ec27b1
|
Commit missing parts of e4615e7.
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2015-12-21 08:02:04 +08:00 |
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183e855229
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remove workaround_asyncio263
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2015-12-20 23:26:48 +08:00 |
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a26ffc5bfb
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setup.py: use consistent interpreter
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2015-12-20 23:20:38 +08:00 |
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2ae63570dd
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frontend/coretool: verbosity control
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2015-12-20 23:17:31 +08:00 |
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5769107936
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gateware/rtio: keep counter clock domain transfer active during CSR reset
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2015-12-20 22:12:34 +08:00 |
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b96e0d241e
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coredevice/analyzer: set VCD timescale
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2015-12-20 22:06:07 +08:00 |
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4b5c10b641
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coredevice/core: remove default period
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2015-12-20 22:05:52 +08:00 |
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cdcb57effe
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coredevice/analyzer: basic VCD writing
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2015-12-20 19:32:52 +08:00 |
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whitequark
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e4615e7b37
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transforms.int_monomorphizer: visit children of CallT.
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2015-12-20 18:07:31 +08:00 |
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