869a282410
satman: use riscv
2021-09-10 13:20:31 +08:00
ebb9f298b5
proto_artiq: update alloc type path
2021-09-10 13:20:31 +08:00
97a0132f15
libio: update alloc type path
2021-09-10 13:20:31 +08:00
37ea863004
libio: pin failure version
2021-09-10 13:20:31 +08:00
3ff74e0693
bootloader: handle .sbss generation in .ld
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Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
448fe0e8cf
bootloader: fix panic
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Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
8294d7fea5
bootloader: swap endianness
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Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
13032272fd
bootloader: add rv32 exception handler
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Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
46102ee737
board_misoc: build vectors.S with rv64 target in misoc
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Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
b87ea79d51
rv32: rm irq & vexriscv-rust
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Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
9aee42f0f2
rv32/boot: remove hotswap
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Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
82b4052cd6
libboard_misoc: vexriscv integration
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Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
Leon Riesebos
2cf144a60c
ddb_template: edge counter keys correspond with according ttl keys
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previously ttl_counter_0 and ttl_0 could be on completely different physical ttl output channels
with this change, ttl_0_counter (note the changed key format) is always on the same channel as ttl_0
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-09-06 09:06:04 +08:00
e7a46ec767
Merge pull request #1749 from airwoodix/phaser-frame-alignment-utils
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Phaser: add helpers to align updates with RTIO timeline
2021-09-03 14:00:17 +02:00
4d7bd3ee32
phaser: fail init() if frame timestamp measurement times out
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Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-03 12:01:26 +02:00
075cb26dd7
phaser: rename get_next_frame_timestamp() to get_next_frame_mu()
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and implement review comments (PR #1749 )
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-03 09:58:01 +02:00
7aebf02f84
phaser: docs: add reference to get_next_frame_timestamps(), fix typo
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Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-01 17:44:46 +02:00
61b44d40dd
phaser: add labels to debug init prints
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Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-01 17:43:30 +02:00
65f8a97b56
phaser: add helpers to align updates to the RTIO timeline
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Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-01 17:42:54 +02:00
11790c6d7c
Merge pull request #1746 from quartiq/suservo_tester
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Suservo tester
2021-08-19 10:20:29 +02:00
SingularitySurfer
65f63e6927
fix suservo start
2021-08-19 07:38:48 +00:00
a53162d01d
tester: tweak suservo
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* p gain 1 to get reasonable power
* refine testing instructions and comments
2021-08-19 09:17:14 +02:00
SingularitySurfer
4d21a72407
Implement SUServo tester.
2021-08-18 15:10:27 +00:00
Mikołaj Sowiński
898122f3e5
Added support for HVAMP_8CH ( #1741 )
2021-08-16 13:39:00 +08:00
420891ba54
syntax
2021-08-12 13:01:35 +08:00
9f94bc61ae
missing part of 477b1516d
2021-08-12 12:55:37 +08:00
c69a1316ad
compiler: stop using sys.version_info for parser
2021-08-12 12:52:24 +08:00
477b1516d3
remove profiler
2021-08-12 12:51:55 +08:00
e3edb505e3
setup.py: remove outdated dependency_links
2021-08-12 12:48:46 +08:00
67847f98f4
artiq_run: fix multiarch
2021-08-12 12:48:10 +08:00
7879d3630b
made kc705/gtx interface more similar to kasli/gtp
2021-08-10 18:53:52 +08:00
242dfae38e
kc705: fix DRTIO targets
2021-08-06 15:41:47 +08:00
5111132ef0
ICAP: prevent sayma from using it ( #1740 )
2021-08-06 15:08:30 +08:00
dc546630e4
kc705: DRTIO variants WIP
2021-08-06 14:41:41 +08:00
fd824f7ad0
ddb_template: print LED channel nos on Kasli v2
2021-08-05 17:29:38 +02:00
c9608c0a89
zotino: default div_read unified with ad53xx at 16, fix ad53xx doc
2021-08-05 17:42:11 +08:00
6b88ea563d
talk to ICAP primitive to restart gateware ( #1733 )
2021-08-05 17:00:31 +08:00
97e994700b
compiler: turn __repr__ into __str__ when sphinx is used. Closes #741
2021-08-05 11:32:20 +08:00
c3d765f745
ad9910: fix type annotations
2021-08-05 11:30:54 +08:00
1e869aedd3
docs: clarify rtio_clock=e req's and use case
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This regularly leads to people misunderstanding the setting.
Mentioning the Si5324 specifically or Urukul synchronization doesn't help constraining or explaining the feature, its consequences and requirements.
Despite being non-standard this feature is also generally not sufficient to achieve cross-device determinism as the other devices need to be made deterministic as well.
2021-08-03 11:36:04 +02:00
53a98acfe4
artiq_flash: cleanup openocd handling, do not follow symlinks
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Not following symlinks allows files to be added to OpenOCD via nixpkgs buildEnv.
2021-07-26 17:01:24 +08:00
30e5e06a33
moninj: fix read of incomplete data ( #1729 )
2021-07-22 17:56:38 +08:00
ebb67eaeee
applets: add length warning message on plot for plot_xy_hist and fix bug ( #1725 )
2021-07-19 15:45:48 +08:00
943a95e07a
applets: add data length warning message for plot_xy ( #1722 )
2021-07-19 15:14:15 +08:00
e996b5f635
applets: fix warning timing
2021-07-19 12:26:01 +08:00
796aeabb53
documentation: correct artiq_coremgmt examples
2021-07-19 12:09:51 +08:00
4fb8ea5b73
artiq_flash: determine which firmware to flash by looking at filesystem
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Closes #1719
2021-07-14 16:43:00 +08:00
5cd721c514
applets: add plot_hist dataset length mismatch warning ( #1718 )
2021-07-14 15:57:55 +08:00
d327d2a505
doc: document shell-dev shortcut
2021-07-14 08:32:03 +08:00
bc7ce7d6aa
doc: mention Vivado version from vivado.nix. Closes #1715
2021-07-14 08:27:08 +08:00
