8513f0b0d4
minor cleanup
2018-05-21 15:35:00 +08:00
f953bee79e
kasli_test: add RF switch control
2018-05-18 23:48:29 +08:00
f457b59985
kasli_tester: bail out when run from ARTIQ master
2018-05-18 23:30:52 +08:00
3cbcb3bff6
move mitll, sysu and ustc device_dbs to kasli_basic
2018-05-18 23:20:40 +08:00
bdfd993818
kasli_tester: add Urukul support
2018-05-18 23:18:03 +08:00
9a4408a570
add Kasli TTL tester
2018-05-18 22:52:53 +08:00
37bd0c2566
kasli: add USTC target
2018-05-18 16:15:07 +08:00
73f8e61478
kasli_sysu: fix TTL directions in example device_db
2018-05-18 16:13:50 +08:00
a100c73dfe
suservo: support pure-I
2018-05-14 18:48:27 +00:00
0c1caf0744
suservo: clean up and beautify example
2018-05-14 15:22:47 +02:00
504d37b66b
suservo: add SI units functions and document
...
m-labs/artiq#788
2018-05-14 12:26:49 +00:00
3027951dd8
integrate new AD9914 driver
...
moninj, analyzer, docs, examples, tests.
2018-05-13 23:29:35 +08:00
f055bf88f6
suservo: add clip flags ( #992 )
2018-05-09 07:16:15 +00:00
8812824fb2
suservo: speed up example, interlock mem
2018-04-27 17:17:17 +00:00
5f00326c65
suservo: coeff mem write port READ_FIRST
2018-04-27 15:43:32 +00:00
73fa572275
suservo: documentation, small API changes
2018-04-27 16:53:22 +02:00
fe9834bac4
suservo: update 'technology preview' example [wip]
...
Still with mostly undocumented and unstable API.
2018-04-27 12:04:17 +00:00
307cd07b9d
suservo: lots of gateware/ runtime changes
...
tested/validated:
* servo enable/disable
* dds interface, timing, io_update, mask_nu
* channel control (en_out, en_iir, profile)
* profile configuration (coefficients, delays, offsets, channel)
* adc timings and waveforms measured
* asf state readback
* adc readback
individual changes below:
suservo: correct rtio readback
suservo: example, device_db [wip]
suservo: change rtio channel layout
suservo: mem ports in rio domain
suservo: sck clocked from rio_phy
suservo: cleanup, straighten out timing
suservo: dds cs polarity
suservo: simplify pipeline
suservo: drop unused eem names
suservo: decouple adc SR from IIR
suservo: expand coredevice layer
suservo: start the correct stage
suservo: actually load ctrl
suservo: refactor/tweak adc timing
suservo: implement cpld and dds init
2018-04-27 13:50:26 +02:00
8a1151b54f
suservo: example device db
2018-04-25 17:14:25 +00:00
4fe09fddd5
examples/kc705_nist_clock: update to new ad53xx driver
2018-04-22 15:03:30 +08:00
48b48e44dd
kasli/mitll: fix demo
2018-04-17 20:15:38 +08:00
79f4892e22
kasli/mitll: fix RTIO channel numbers
2018-04-17 20:15:17 +08:00
eac447278f
kasli: add MITLL variant
2018-04-17 19:00:11 +08:00
8d62ea2288
examples: fix KC705 ad53xx
2018-03-25 11:19:54 +08:00
a20dfd9c00
examples/master: ad5360 -> zotino
2018-03-24 16:46:59 +01:00
0505e9124f
kc705: port device_db, ad53xx/zotino example
2018-03-24 16:05:26 +01:00
68e433a3a8
opticlock/device_db: resurrect novogorny
...
deleted in a992a67
2018-03-24 13:46:45 +01:00
hartytp
a992a672d9
coredevice/zotino: add ( #969 )
...
* Replace ad5360 driver with a ad53xx driver, designed to have a nicer interface
Add Zotino driver and add to opticlock target for Kasli
Test Zotino on hw:
- Verify all timings on the hardware with a scope
- Verify that we can correctly set and read back all registers in a loop (checks for SI and driver issues)
- check we can set LEDs correctly
- check calibration routine + all si unit functions with a good DVM
- look at DAC transitions on a scope (while triggering of a TTL) on persist to check there are no LDAC glitches etc
To do: update examples and e.g. KC705 device db.
2018-03-24 13:41:18 +01:00
770b0a7b79
novogorny: conv -> cnv
...
* parity with sampler
* also add novogorny device to opticlock
2018-03-21 18:38:42 +00:00
12d699f2a8
suservo: add sampler example
2018-03-21 12:21:53 +00:00
f5a1001114
suservo: add device database and artiq_flash variant
2018-03-21 08:53:26 +00:00
37f5f0d38d
examples: add DMA to Sayma DRTIO
2018-03-09 00:49:24 +08:00
8bd85caafb
examples: fix Sayma DRTIO ref_period
2018-03-08 15:09:33 +08:00
5e074f83ac
examples: update kasli sysu
2018-03-02 16:05:12 +08:00
a9daaad77b
kasli: add SYSU variant and device_db
2018-03-02 14:44:31 +08:00
a7720d05cd
firmware, sayma: port converter_spi to spi2
...
* ksupport/nrt_bus
* port ad9154, hmc830, hmc7043
* port local_spi and drtio_spi
* port kernel_proto libdrtioaux, satman
* change sayma_rtm gateware over
* add spi2 NRTSPIMaster
* remove spi NRTSPIMaster
* change sayma device_db
* change HMC830 to open mode and explicitly sequence open mode
2018-03-01 11:19:18 +01:00
f97163cdee
examples/master: sync device_db with kc705_nist_clock
2018-02-27 19:40:00 +01:00
whitequark
916b10ca94
examples: spi → spi2.
2018-02-27 18:36:45 +00:00
760724c500
kasli/device_db: fix i2c switch addr
2018-02-26 11:37:12 +01:00
771bf87b56
kc705: port amc101_dac/spi0 and sma_spi to spi2
2018-02-22 17:19:51 +01:00
d4a10dcbd4
urukul: fix example
2018-02-22 11:28:50 +01:00
f8e6b4f4e3
ad5360: port to spi2
...
* kc705 nist_clock target gateware
* coredevice driver
* moninj code
* test/example/device_db
This is untested as we don't have a AD5360 board right now.
Will be tested with Zotino v1.1
m-labs/artiq#926
2018-02-22 10:25:46 +01:00
0d8145084d
test_spi: move to new spi2 core
2018-02-21 19:41:05 +01:00
a63fd306af
urukul: use spi2
...
* switch kc705 and kasli targets to spi2 gateware on urukul
* rewrite urukul, ad9912, ad9910
* update example experiments, device_dbs
2018-02-21 15:00:28 +00:00
01fa6c1c2e
reorganize examples
2018-02-19 15:46:08 +08:00
7002bea0ab
kasli: clean up urukul example more
2018-02-15 14:21:17 +01:00
b6395a809b
kasli: remove old urukul test code
2018-02-13 22:16:57 +01:00
be693bc8a9
opticlock: examples
2018-02-13 22:13:40 +01:00
e67a289e2b
examples: add SAWG sines (DAC synchronization test)
2018-02-13 20:02:51 +08:00
6f90a43df2
examples: reorganize for new hardware
2018-01-28 02:11:45 +08:00
