4c59c0fecf
Revert "drtio: order resets wrt writes"
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This reverts commit 9a048c2b3a
.
2016-12-12 17:49:07 +08:00
6a60afcba0
runtime: clear all DRTIO FIFOs first, reset remote PHYs on link init
2016-12-12 17:48:25 +08:00
8f747fa209
drtio: clear underflow and sequence error on reset
2016-12-12 17:39:14 +08:00
7196bc21c1
rtio: simplify error reset logic
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Channel is always selected when reset is issued.
2016-12-12 17:35:10 +08:00
1c74249638
runtime: reset local DRTIO state
2016-12-12 17:30:41 +08:00
9a048c2b3a
drtio: order resets wrt writes
2016-12-12 17:18:07 +08:00
ac792ec52b
RELEASE_NOTES: 2.1
2016-12-12 13:12:18 +08:00
cbc49ea91d
set asyncio loop earlier in controllers ( #627 )
2016-12-12 11:38:02 +08:00
3743633b04
Revert "pc_rpc: use ProactorEventLoop on Windows ( #627 )"
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This reverts commit 7d4297b9bb
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2016-12-12 11:33:56 +08:00
09fb4869f3
runtime: centralize (D)RTIO management
2016-12-09 19:24:00 +08:00
0a9f69a3ed
kc705_drtio_master: add missing rtio_core CSRs
2016-12-09 19:23:36 +08:00
4422b6902a
runtime: silence unused variable warnings
2016-12-09 19:23:06 +08:00
bc36bda94a
perform RTIO init on comms CPU side
2016-12-09 14:16:55 +08:00
5accb7a0ac
manual: add missing quote
2016-12-09 14:16:32 +08:00
f6071a5812
sawg/hbf: tweak pipeline for timing
2016-12-08 17:00:53 +01:00
b7a308d33d
fir: register multiplier output
2016-12-08 17:00:39 +01:00
ca636ef28a
conda/phaser: build-depend on numpy
2016-12-08 16:23:40 +01:00
18e3f58c22
sawg: reduce coefficient width
2016-12-08 16:14:32 +01:00
598da09a93
sawg: fix latency
2016-12-08 15:53:35 +01:00
f4ceace253
test/fir: needs mpl. don't run by default
2016-12-08 15:49:50 +01:00
efc95043c4
test/sawg: patch spline
2016-12-08 15:49:23 +01:00
3eef6229cc
sawg: use ParallelHBFCascade to AA [WIP]
2016-12-08 15:32:57 +01:00
a629eb1665
fir: add ParallelHBFCascade
2016-12-08 15:30:26 +01:00
d303225249
fir: add ParallelFIR and test
2016-12-08 15:21:04 +01:00
7e0f3edca5
gateware/dsp: add FIR and test
2016-12-07 19:14:23 +01:00
4c3717932e
drtio: link layer debugging CSRs
2016-12-07 23:03:14 +08:00
d34084be0f
README_PHASER: update
2016-12-06 20:22:47 +01:00
5efd0fcea5
sawg: documentation
2016-12-06 19:25:40 +01:00
b311830fc4
kc705: fix drtio_aux address conflict
2016-12-06 18:28:48 +08:00
4669d3f02f
kc705_drtio_satellite: add MiSoC system, hook up auxiliary controller
2016-12-06 14:56:42 +08:00
f4b7d39a69
kc705_drtio_master: hook up auxiliary controller
2016-12-06 14:56:15 +08:00
f3c50a37ca
rtio: always read full DMA sequence
2016-12-06 01:05:47 +08:00
c413d95b49
rtio: fix DMA get_csrs
2016-12-05 18:12:09 +08:00
eb8d630148
rtio: test DMA RTIO wait state
2016-12-05 18:01:48 +08:00
b677c69faf
rtio: fix handling of o_status in DMA
2016-12-05 18:01:48 +08:00
75ea13748a
rtio: fix DMA data MSB and stop signaling, self-checking unittest
2016-12-05 18:01:48 +08:00
43a5455058
rtio: DMA unittest WIP
2016-12-05 18:01:48 +08:00
a5834765d0
rtio: more DMA fixes, better stopping mechanism
2016-12-05 18:01:48 +08:00
30bce5ad35
rtio: DMA fixes
2016-12-05 18:01:48 +08:00
74fe5c3ef0
test: make gateware simulations discoverable
2016-12-05 18:01:48 +08:00
whitequark
668928a16c
runtime: fix a lifetime issue in lwip::Pbuf.
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This would have allowed a use-after-move (or -free) to typecheck.
2016-12-05 05:24:27 +00:00
whitequark
f68e4ae519
compiler: rein in overzealous cast monomorphization.
2016-12-05 05:08:57 +00:00
whitequark
218720cfa7
Revert "compiler: rein in overzealous cast monomorphization."
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This reverts commit 4305903dde
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This broke the monomorphizer/round.py test.
2016-12-05 05:04:26 +00:00
whitequark
4305903dde
compiler: rein in overzealous cast monomorphization.
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This caused failures on e.g. "int32(var64a >> var64b)", where
the type of the argument is already fully known, but was unified
with the result of the cast anyway.
2016-12-05 04:38:25 +00:00
whitequark
4c94873560
runtime: upgrade lwip to release 2.0.0.
2016-12-05 04:35:02 +00:00
whitequark
b5a684830d
compiler: fix parsing of TList annotations ( fixes #632 ).
2016-12-05 03:18:56 +00:00
695eb705b3
sawg: extract spline
2016-12-04 16:52:08 +01:00
39becd0b4e
sawg: document
2016-12-04 16:50:49 +01:00
88ad054ab6
Merge branch 'drtio'
2016-12-03 23:25:17 +08:00
5d145ff912
drtio: add false paths between sys and transceiver clocks
2016-12-03 23:03:01 +08:00