forked from M-Labs/artiq
eem: support specifying I/O standard
Xilinx FPGAs require different LVDS I/O standard names depending on I/O bank voltage.
This commit is contained in:
parent
3168b193e6
commit
9b016dcd6d
@ -21,25 +21,25 @@ def _eem_pin(eem, i, pol):
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class _EEM:
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@classmethod
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def add_extension(cls, target, eem, *args):
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def add_extension(cls, target, eem, *args, **kwargs):
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name = cls.__name__
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target.platform.add_extension(cls.io(eem, *args))
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target.platform.add_extension(cls.io(eem, *args, **kwargs))
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print("{} (EEM{}) starting at RTIO channel {}"
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.format(name, eem, len(target.rtio_channels)))
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class DIO(_EEM):
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@staticmethod
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def io(eem):
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def io(eem, iostandard="LVDS_25"):
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return [("dio{}".format(eem), i,
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Subsignal("p", Pins(_eem_pin(eem, i, "p"))),
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Subsignal("n", Pins(_eem_pin(eem, i, "n"))),
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IOStandard("LVDS_25"))
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IOStandard(iostandard))
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for i in range(8)]
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@classmethod
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def add_std(cls, target, eem, ttl03_cls, ttl47_cls):
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cls.add_extension(target, eem)
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def add_std(cls, target, eem, ttl03_cls, ttl47_cls, iostandard="LVDS_25"):
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cls.add_extension(target, eem, iostandard=iostandard)
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for i in range(4):
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pads = target.platform.request("dio{}".format(eem), i)
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@ -55,7 +55,7 @@ class DIO(_EEM):
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class Urukul(_EEM):
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@staticmethod
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def io(eem, eem_aux):
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def io(eem, eem_aux, iostandard="LVDS_25"):
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ios = [
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("urukul{}_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
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@ -63,7 +63,7 @@ class Urukul(_EEM):
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Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
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Subsignal("cs_n", Pins(
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*(_eem_pin(eem, i + 3, "p") for i in range(3)))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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("urukul{}_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
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@ -71,7 +71,7 @@ class Urukul(_EEM):
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Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
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Subsignal("cs_n", Pins(
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*(_eem_pin(eem, i + 3, "n") for i in range(3)))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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]
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ttls = [(6, eem, "io_update"),
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@ -90,26 +90,26 @@ class Urukul(_EEM):
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("urukul{}_{}".format(eem, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard("LVDS_25")
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IOStandard(iostandard)
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))
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return ios
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@staticmethod
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def io_qspi(eem0, eem1):
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def io_qspi(eem0, eem1, iostandard="LVDS_25"):
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ios = [
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("urukul{}_spi_p".format(eem0), 0,
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Subsignal("clk", Pins(_eem_pin(eem0, 0, "p"))),
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Subsignal("mosi", Pins(_eem_pin(eem0, 1, "p"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem0, 3, "p"), _eem_pin(eem0, 4, "p"))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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("urukul{}_spi_n".format(eem0), 0,
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Subsignal("clk", Pins(_eem_pin(eem0, 0, "n"))),
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Subsignal("mosi", Pins(_eem_pin(eem0, 1, "n"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem0, 3, "n"), _eem_pin(eem0, 4, "n"))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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]
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ttls = [(6, eem0, "io_update"),
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@ -123,7 +123,7 @@ class Urukul(_EEM):
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("urukul{}_{}".format(eem0, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard("LVDS_25")
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IOStandard(iostandard)
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))
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ios += [
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("urukul{}_qspi_p".format(eem0), 0,
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@ -133,7 +133,7 @@ class Urukul(_EEM):
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Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "p"))),
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Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "p"))),
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Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "p"))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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("urukul{}_qspi_n".format(eem0), 0,
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Subsignal("cs", Pins(_eem_pin(eem0, 5, "n"))),
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@ -142,14 +142,14 @@ class Urukul(_EEM):
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Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "n"))),
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Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "n"))),
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Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "n"))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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]
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return ios
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@classmethod
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def add_std(cls, target, eem, eem_aux, ttl_out_cls):
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cls.add_extension(target, eem, eem_aux)
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def add_std(cls, target, eem, eem_aux, ttl_out_cls, iostandard="LVDS_25"):
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cls.add_extension(target, eem, eem_aux, iostandard=iostandard)
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phy = spi2.SPIMaster(target.platform.request("urukul{}_spi_p".format(eem)),
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target.platform.request("urukul{}_spi_n".format(eem)))
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@ -173,41 +173,41 @@ class Urukul(_EEM):
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class Sampler(_EEM):
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@staticmethod
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def io(eem, eem_aux):
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def io(eem, eem_aux, iostandard="LVDS_25"):
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ios = [
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("sampler{}_adc_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
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Subsignal("miso", Pins(_eem_pin(eem, 1, "p"))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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("sampler{}_adc_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
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Subsignal("miso", Pins(_eem_pin(eem, 1, "n"))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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("sampler{}_pgia_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 4, "p"))),
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Subsignal("mosi", Pins(_eem_pin(eem, 5, "p"))),
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Subsignal("miso", Pins(_eem_pin(eem, 6, "p"))),
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Subsignal("cs_n", Pins(_eem_pin(eem, 7, "p"))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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("sampler{}_pgia_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 4, "n"))),
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Subsignal("mosi", Pins(_eem_pin(eem, 5, "n"))),
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Subsignal("miso", Pins(_eem_pin(eem, 6, "n"))),
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Subsignal("cs_n", Pins(_eem_pin(eem, 7, "n"))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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] + [
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("sampler{}_{}".format(eem, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard("LVDS_25")
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IOStandard(iostandard)
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) for i, j, sig in [
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(2, eem, "sdr"),
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(3, eem, "cnv")
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]
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]
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]
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if eem_aux is not None:
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ios += [
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@ -218,7 +218,7 @@ class Sampler(_EEM):
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Subsignal("sdoc", Pins(_eem_pin(eem_aux, 3, "p"))),
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Subsignal("sdod", Pins(_eem_pin(eem_aux, 4, "p"))),
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Misc("DIFF_TERM=TRUE"),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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("sampler{}_adc_data_n".format(eem), 0,
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Subsignal("clkout", Pins(_eem_pin(eem_aux, 0, "n"))),
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@ -227,14 +227,14 @@ class Sampler(_EEM):
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Subsignal("sdoc", Pins(_eem_pin(eem_aux, 3, "n"))),
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Subsignal("sdod", Pins(_eem_pin(eem_aux, 4, "n"))),
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Misc("DIFF_TERM=TRUE"),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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]
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return ios
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@classmethod
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def add_std(cls, target, eem, eem_aux, ttl_out_cls):
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cls.add_extension(target, eem, eem_aux)
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def add_std(cls, target, eem, eem_aux, ttl_out_cls, iostandard="LVDS_25"):
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cls.add_extension(target, eem, eem_aux, iostandard=iostandard)
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phy = spi2.SPIMaster(
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target.platform.request("sampler{}_adc_spi_p".format(eem)),
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@ -258,7 +258,7 @@ class Sampler(_EEM):
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class Novogorny(_EEM):
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@staticmethod
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def io(eem):
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def io(eem, iostandard="LVDS_25"):
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return [
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("novogorny{}_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
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@ -266,7 +266,7 @@ class Novogorny(_EEM):
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Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem, 3, "p"), _eem_pin(eem, 4, "p"))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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("novogorny{}_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
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@ -274,23 +274,23 @@ class Novogorny(_EEM):
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Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem, 3, "n"), _eem_pin(eem, 4, "n"))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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] + [
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("novogorny{}_{}".format(eem, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard("LVDS_25")
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IOStandard(iostandard)
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) for i, j, sig in [
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(5, eem, "cnv"),
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(6, eem, "busy"),
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(7, eem, "scko"),
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]
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]
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]
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@classmethod
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def add_std(cls, target, eem, ttl_out_cls):
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cls.add_extension(target, eem)
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def add_std(cls, target, eem, ttl_out_cls, iostandard="LVDS_25"):
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cls.add_extension(target, eem, iostandard=iostandard)
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phy = spi2.SPIMaster(target.platform.request("novogorny{}_spi_p".format(eem)),
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target.platform.request("novogorny{}_spi_n".format(eem)))
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@ -305,7 +305,7 @@ class Novogorny(_EEM):
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class Zotino(_EEM):
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@staticmethod
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def io(eem):
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def io(eem, iostandard="LVDS_25"):
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return [
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("zotino{}_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
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@ -313,7 +313,7 @@ class Zotino(_EEM):
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Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem, 3, "p"), _eem_pin(eem, 4, "p"))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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("zotino{}_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
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@ -321,23 +321,23 @@ class Zotino(_EEM):
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Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem, 3, "n"), _eem_pin(eem, 4, "n"))),
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IOStandard("LVDS_25"),
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IOStandard(iostandard),
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),
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] + [
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("zotino{}_{}".format(eem, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard("LVDS_25")
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IOStandard(iostandard)
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) for i, j, sig in [
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(5, eem, "ldac_n"),
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(6, eem, "busy"),
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(7, eem, "clr_n"),
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]
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]
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]
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@classmethod
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def add_std(cls, target, eem, ttl_out_cls):
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cls.add_extension(target, eem)
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def add_std(cls, target, eem, ttl_out_cls, iostandard="LVDS_25"):
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cls.add_extension(target, eem, iostandard=iostandard)
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spi_phy = spi2.SPIMaster(target.platform.request("zotino{}_spi_p".format(eem)),
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target.platform.request("zotino{}_spi_n".format(eem)))
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@ -361,29 +361,29 @@ class Zotino(_EEM):
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class Grabber(_EEM):
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@staticmethod
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def io(eem, eem_aux):
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def io(eem, eem_aux, iostandard="LVDS_25"):
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ios = [
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("grabber{}_video".format(eem), 0,
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Subsignal("clk_p", Pins(_eem_pin(eem, 0, "p"))),
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Subsignal("clk_n", Pins(_eem_pin(eem, 0, "n"))),
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Subsignal("sdi_p", Pins(*[_eem_pin(eem, i, "p") for i in range(1, 5)])),
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Subsignal("sdi_n", Pins(*[_eem_pin(eem, i, "n") for i in range(1, 5)])),
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IOStandard("LVDS_25"), Misc("DIFF_TERM=TRUE")
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IOStandard(iostandard), Misc("DIFF_TERM=TRUE")
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),
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("grabber{}_cc0".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem_aux, 5, "p"))),
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Subsignal("n", Pins(_eem_pin(eem_aux, 5, "n"))),
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IOStandard("LVDS_25")
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IOStandard(iostandard)
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),
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("grabber{}_cc1".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem_aux, 6, "p"))),
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Subsignal("n", Pins(_eem_pin(eem_aux, 6, "n"))),
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IOStandard("LVDS_25")
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IOStandard(iostandard)
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),
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("grabber{}_cc2".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem_aux, 7, "p"))),
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Subsignal("n", Pins(_eem_pin(eem_aux, 7, "n"))),
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IOStandard("LVDS_25")
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IOStandard(iostandard)
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),
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]
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if eem_aux is not None:
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@ -393,29 +393,29 @@ class Grabber(_EEM):
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Subsignal("clk_n", Pins(_eem_pin(eem_aux, 0, "n"))),
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Subsignal("sdi_p", Pins(*[_eem_pin(eem_aux, i, "p") for i in range(1, 5)])),
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Subsignal("sdi_n", Pins(*[_eem_pin(eem_aux, i, "n") for i in range(1, 5)])),
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IOStandard("LVDS_25"), Misc("DIFF_TERM=TRUE")
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IOStandard(iostandard), Misc("DIFF_TERM=TRUE")
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),
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("grabber{}_serrx".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem_aux, 5, "p"))),
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Subsignal("n", Pins(_eem_pin(eem_aux, 5, "n"))),
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IOStandard("LVDS_25"), Misc("DIFF_TERM=TRUE")
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IOStandard(iostandard), Misc("DIFF_TERM=TRUE")
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),
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("grabber{}_sertx".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem_aux, 6, "p"))),
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Subsignal("n", Pins(_eem_pin(eem_aux, 6, "n"))),
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IOStandard("LVDS_25")
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IOStandard(iostandard)
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),
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("grabber{}_cc3".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem_aux, 7, "p"))),
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Subsignal("n", Pins(_eem_pin(eem_aux, 7, "n"))),
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IOStandard("LVDS_25")
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IOStandard(iostandard)
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),
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]
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return ios
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@classmethod
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def add_std(cls, target, eem, eem_aux=None, ttl_out_cls=None):
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cls.add_extension(target, eem, eem_aux)
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def add_std(cls, target, eem, eem_aux=None, ttl_out_cls=None, iostandard="LVDS_25"):
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cls.add_extension(target, eem, eem_aux, iostandard=iostandard)
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pads = target.platform.request("grabber{}_video".format(eem))
|
||||
target.platform.add_period_constraint(pads.clk_p, 14.71)
|
||||
@ -452,15 +452,16 @@ class Grabber(_EEM):
|
||||
|
||||
class SUServo(_EEM):
|
||||
@staticmethod
|
||||
def io(*eems):
|
||||
def io(*eems, iostandard="LVDS_25"):
|
||||
assert len(eems) == 6
|
||||
return (Sampler.io(*eems[0:2])
|
||||
+ Urukul.io_qspi(*eems[2:4])
|
||||
+ Urukul.io_qspi(*eems[4:6]))
|
||||
return (Sampler.io(*eems[0:2], iostandard=iostandard)
|
||||
+ Urukul.io_qspi(*eems[2:4], iostandard=iostandard)
|
||||
+ Urukul.io_qspi(*eems[4:6], iostandard=iostandard))
|
||||
|
||||
@classmethod
|
||||
def add_std(cls, target, eems_sampler, eems_urukul0, eems_urukul1,
|
||||
t_rtt=4, clk=1, shift=11, profile=5):
|
||||
t_rtt=4, clk=1, shift=11, profile=5,
|
||||
iostandard="LVDS_25"):
|
||||
"""Add a 8-channel Sampler-Urukul Servo
|
||||
|
||||
:param t_rtt: upper estimate for clock round-trip propagation time from
|
||||
@ -478,7 +479,8 @@ class SUServo(_EEM):
|
||||
(default: 5)
|
||||
"""
|
||||
cls.add_extension(
|
||||
target, *(eems_sampler + eems_urukul0 + eems_urukul1))
|
||||
target, *(eems_sampler + eems_urukul0 + eems_urukul1),
|
||||
iostandard=iostandard)
|
||||
eem_sampler = "sampler{}".format(eems_sampler[0])
|
||||
eem_urukul0 = "urukul{}".format(eems_urukul0[0])
|
||||
eem_urukul1 = "urukul{}".format(eems_urukul1[0])
|
||||
|
||||
Loading…
Reference in New Issue
Block a user