From 9b016dcd6d405e9693a8fafe3563f808caf531e2 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Tue, 17 Jul 2018 18:55:17 +0800 Subject: [PATCH] eem: support specifying I/O standard Xilinx FPGAs require different LVDS I/O standard names depending on I/O bank voltage. --- artiq/gateware/eem.py | 122 +++++++++++++++++++++--------------------- 1 file changed, 62 insertions(+), 60 deletions(-) diff --git a/artiq/gateware/eem.py b/artiq/gateware/eem.py index 78155b19b..34680a714 100644 --- a/artiq/gateware/eem.py +++ b/artiq/gateware/eem.py @@ -21,25 +21,25 @@ def _eem_pin(eem, i, pol): class _EEM: @classmethod - def add_extension(cls, target, eem, *args): + def add_extension(cls, target, eem, *args, **kwargs): name = cls.__name__ - target.platform.add_extension(cls.io(eem, *args)) + target.platform.add_extension(cls.io(eem, *args, **kwargs)) print("{} (EEM{}) starting at RTIO channel {}" .format(name, eem, len(target.rtio_channels))) class DIO(_EEM): @staticmethod - def io(eem): + def io(eem, iostandard="LVDS_25"): return [("dio{}".format(eem), i, Subsignal("p", Pins(_eem_pin(eem, i, "p"))), Subsignal("n", Pins(_eem_pin(eem, i, "n"))), - IOStandard("LVDS_25")) + IOStandard(iostandard)) for i in range(8)] @classmethod - def add_std(cls, target, eem, ttl03_cls, ttl47_cls): - cls.add_extension(target, eem) + def add_std(cls, target, eem, ttl03_cls, ttl47_cls, iostandard="LVDS_25"): + cls.add_extension(target, eem, iostandard=iostandard) for i in range(4): pads = target.platform.request("dio{}".format(eem), i) @@ -55,7 +55,7 @@ class DIO(_EEM): class Urukul(_EEM): @staticmethod - def io(eem, eem_aux): + def io(eem, eem_aux, iostandard="LVDS_25"): ios = [ ("urukul{}_spi_p".format(eem), 0, Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))), @@ -63,7 +63,7 @@ class Urukul(_EEM): Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))), Subsignal("cs_n", Pins( *(_eem_pin(eem, i + 3, "p") for i in range(3)))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ("urukul{}_spi_n".format(eem), 0, Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))), @@ -71,7 +71,7 @@ class Urukul(_EEM): Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))), Subsignal("cs_n", Pins( *(_eem_pin(eem, i + 3, "n") for i in range(3)))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ] ttls = [(6, eem, "io_update"), @@ -90,26 +90,26 @@ class Urukul(_EEM): ("urukul{}_{}".format(eem, sig), 0, Subsignal("p", Pins(_eem_pin(j, i, "p"))), Subsignal("n", Pins(_eem_pin(j, i, "n"))), - IOStandard("LVDS_25") + IOStandard(iostandard) )) return ios @staticmethod - def io_qspi(eem0, eem1): + def io_qspi(eem0, eem1, iostandard="LVDS_25"): ios = [ ("urukul{}_spi_p".format(eem0), 0, Subsignal("clk", Pins(_eem_pin(eem0, 0, "p"))), Subsignal("mosi", Pins(_eem_pin(eem0, 1, "p"))), Subsignal("cs_n", Pins( _eem_pin(eem0, 3, "p"), _eem_pin(eem0, 4, "p"))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ("urukul{}_spi_n".format(eem0), 0, Subsignal("clk", Pins(_eem_pin(eem0, 0, "n"))), Subsignal("mosi", Pins(_eem_pin(eem0, 1, "n"))), Subsignal("cs_n", Pins( _eem_pin(eem0, 3, "n"), _eem_pin(eem0, 4, "n"))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ] ttls = [(6, eem0, "io_update"), @@ -123,7 +123,7 @@ class Urukul(_EEM): ("urukul{}_{}".format(eem0, sig), 0, Subsignal("p", Pins(_eem_pin(j, i, "p"))), Subsignal("n", Pins(_eem_pin(j, i, "n"))), - IOStandard("LVDS_25") + IOStandard(iostandard) )) ios += [ ("urukul{}_qspi_p".format(eem0), 0, @@ -133,7 +133,7 @@ class Urukul(_EEM): Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "p"))), Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "p"))), Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "p"))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ("urukul{}_qspi_n".format(eem0), 0, Subsignal("cs", Pins(_eem_pin(eem0, 5, "n"))), @@ -142,14 +142,14 @@ class Urukul(_EEM): Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "n"))), Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "n"))), Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "n"))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ] return ios @classmethod - def add_std(cls, target, eem, eem_aux, ttl_out_cls): - cls.add_extension(target, eem, eem_aux) + def add_std(cls, target, eem, eem_aux, ttl_out_cls, iostandard="LVDS_25"): + cls.add_extension(target, eem, eem_aux, iostandard=iostandard) phy = spi2.SPIMaster(target.platform.request("urukul{}_spi_p".format(eem)), target.platform.request("urukul{}_spi_n".format(eem))) @@ -173,41 +173,41 @@ class Urukul(_EEM): class Sampler(_EEM): @staticmethod - def io(eem, eem_aux): + def io(eem, eem_aux, iostandard="LVDS_25"): ios = [ ("sampler{}_adc_spi_p".format(eem), 0, Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))), Subsignal("miso", Pins(_eem_pin(eem, 1, "p"))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ("sampler{}_adc_spi_n".format(eem), 0, Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))), Subsignal("miso", Pins(_eem_pin(eem, 1, "n"))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ("sampler{}_pgia_spi_p".format(eem), 0, Subsignal("clk", Pins(_eem_pin(eem, 4, "p"))), Subsignal("mosi", Pins(_eem_pin(eem, 5, "p"))), Subsignal("miso", Pins(_eem_pin(eem, 6, "p"))), Subsignal("cs_n", Pins(_eem_pin(eem, 7, "p"))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ("sampler{}_pgia_spi_n".format(eem), 0, Subsignal("clk", Pins(_eem_pin(eem, 4, "n"))), Subsignal("mosi", Pins(_eem_pin(eem, 5, "n"))), Subsignal("miso", Pins(_eem_pin(eem, 6, "n"))), Subsignal("cs_n", Pins(_eem_pin(eem, 7, "n"))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ] + [ ("sampler{}_{}".format(eem, sig), 0, Subsignal("p", Pins(_eem_pin(j, i, "p"))), Subsignal("n", Pins(_eem_pin(j, i, "n"))), - IOStandard("LVDS_25") + IOStandard(iostandard) ) for i, j, sig in [ (2, eem, "sdr"), (3, eem, "cnv") - ] + ] ] if eem_aux is not None: ios += [ @@ -218,7 +218,7 @@ class Sampler(_EEM): Subsignal("sdoc", Pins(_eem_pin(eem_aux, 3, "p"))), Subsignal("sdod", Pins(_eem_pin(eem_aux, 4, "p"))), Misc("DIFF_TERM=TRUE"), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ("sampler{}_adc_data_n".format(eem), 0, Subsignal("clkout", Pins(_eem_pin(eem_aux, 0, "n"))), @@ -227,14 +227,14 @@ class Sampler(_EEM): Subsignal("sdoc", Pins(_eem_pin(eem_aux, 3, "n"))), Subsignal("sdod", Pins(_eem_pin(eem_aux, 4, "n"))), Misc("DIFF_TERM=TRUE"), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ] return ios @classmethod - def add_std(cls, target, eem, eem_aux, ttl_out_cls): - cls.add_extension(target, eem, eem_aux) + def add_std(cls, target, eem, eem_aux, ttl_out_cls, iostandard="LVDS_25"): + cls.add_extension(target, eem, eem_aux, iostandard=iostandard) phy = spi2.SPIMaster( target.platform.request("sampler{}_adc_spi_p".format(eem)), @@ -258,7 +258,7 @@ class Sampler(_EEM): class Novogorny(_EEM): @staticmethod - def io(eem): + def io(eem, iostandard="LVDS_25"): return [ ("novogorny{}_spi_p".format(eem), 0, Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))), @@ -266,7 +266,7 @@ class Novogorny(_EEM): Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))), Subsignal("cs_n", Pins( _eem_pin(eem, 3, "p"), _eem_pin(eem, 4, "p"))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ("novogorny{}_spi_n".format(eem), 0, Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))), @@ -274,23 +274,23 @@ class Novogorny(_EEM): Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))), Subsignal("cs_n", Pins( _eem_pin(eem, 3, "n"), _eem_pin(eem, 4, "n"))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ] + [ ("novogorny{}_{}".format(eem, sig), 0, Subsignal("p", Pins(_eem_pin(j, i, "p"))), Subsignal("n", Pins(_eem_pin(j, i, "n"))), - IOStandard("LVDS_25") + IOStandard(iostandard) ) for i, j, sig in [ (5, eem, "cnv"), (6, eem, "busy"), (7, eem, "scko"), - ] + ] ] @classmethod - def add_std(cls, target, eem, ttl_out_cls): - cls.add_extension(target, eem) + def add_std(cls, target, eem, ttl_out_cls, iostandard="LVDS_25"): + cls.add_extension(target, eem, iostandard=iostandard) phy = spi2.SPIMaster(target.platform.request("novogorny{}_spi_p".format(eem)), target.platform.request("novogorny{}_spi_n".format(eem))) @@ -305,7 +305,7 @@ class Novogorny(_EEM): class Zotino(_EEM): @staticmethod - def io(eem): + def io(eem, iostandard="LVDS_25"): return [ ("zotino{}_spi_p".format(eem), 0, Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))), @@ -313,7 +313,7 @@ class Zotino(_EEM): Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))), Subsignal("cs_n", Pins( _eem_pin(eem, 3, "p"), _eem_pin(eem, 4, "p"))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ("zotino{}_spi_n".format(eem), 0, Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))), @@ -321,23 +321,23 @@ class Zotino(_EEM): Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))), Subsignal("cs_n", Pins( _eem_pin(eem, 3, "n"), _eem_pin(eem, 4, "n"))), - IOStandard("LVDS_25"), + IOStandard(iostandard), ), ] + [ ("zotino{}_{}".format(eem, sig), 0, Subsignal("p", Pins(_eem_pin(j, i, "p"))), Subsignal("n", Pins(_eem_pin(j, i, "n"))), - IOStandard("LVDS_25") + IOStandard(iostandard) ) for i, j, sig in [ (5, eem, "ldac_n"), (6, eem, "busy"), (7, eem, "clr_n"), - ] + ] ] @classmethod - def add_std(cls, target, eem, ttl_out_cls): - cls.add_extension(target, eem) + def add_std(cls, target, eem, ttl_out_cls, iostandard="LVDS_25"): + cls.add_extension(target, eem, iostandard=iostandard) spi_phy = spi2.SPIMaster(target.platform.request("zotino{}_spi_p".format(eem)), target.platform.request("zotino{}_spi_n".format(eem))) @@ -361,29 +361,29 @@ class Zotino(_EEM): class Grabber(_EEM): @staticmethod - def io(eem, eem_aux): + def io(eem, eem_aux, iostandard="LVDS_25"): ios = [ ("grabber{}_video".format(eem), 0, Subsignal("clk_p", Pins(_eem_pin(eem, 0, "p"))), Subsignal("clk_n", Pins(_eem_pin(eem, 0, "n"))), Subsignal("sdi_p", Pins(*[_eem_pin(eem, i, "p") for i in range(1, 5)])), Subsignal("sdi_n", Pins(*[_eem_pin(eem, i, "n") for i in range(1, 5)])), - IOStandard("LVDS_25"), Misc("DIFF_TERM=TRUE") + IOStandard(iostandard), Misc("DIFF_TERM=TRUE") ), ("grabber{}_cc0".format(eem), 0, Subsignal("p", Pins(_eem_pin(eem_aux, 5, "p"))), Subsignal("n", Pins(_eem_pin(eem_aux, 5, "n"))), - IOStandard("LVDS_25") + IOStandard(iostandard) ), ("grabber{}_cc1".format(eem), 0, Subsignal("p", Pins(_eem_pin(eem_aux, 6, "p"))), Subsignal("n", Pins(_eem_pin(eem_aux, 6, "n"))), - IOStandard("LVDS_25") + IOStandard(iostandard) ), ("grabber{}_cc2".format(eem), 0, Subsignal("p", Pins(_eem_pin(eem_aux, 7, "p"))), Subsignal("n", Pins(_eem_pin(eem_aux, 7, "n"))), - IOStandard("LVDS_25") + IOStandard(iostandard) ), ] if eem_aux is not None: @@ -393,29 +393,29 @@ class Grabber(_EEM): Subsignal("clk_n", Pins(_eem_pin(eem_aux, 0, "n"))), Subsignal("sdi_p", Pins(*[_eem_pin(eem_aux, i, "p") for i in range(1, 5)])), Subsignal("sdi_n", Pins(*[_eem_pin(eem_aux, i, "n") for i in range(1, 5)])), - IOStandard("LVDS_25"), Misc("DIFF_TERM=TRUE") + IOStandard(iostandard), Misc("DIFF_TERM=TRUE") ), ("grabber{}_serrx".format(eem), 0, Subsignal("p", Pins(_eem_pin(eem_aux, 5, "p"))), Subsignal("n", Pins(_eem_pin(eem_aux, 5, "n"))), - IOStandard("LVDS_25"), Misc("DIFF_TERM=TRUE") + IOStandard(iostandard), Misc("DIFF_TERM=TRUE") ), ("grabber{}_sertx".format(eem), 0, Subsignal("p", Pins(_eem_pin(eem_aux, 6, "p"))), Subsignal("n", Pins(_eem_pin(eem_aux, 6, "n"))), - IOStandard("LVDS_25") + IOStandard(iostandard) ), ("grabber{}_cc3".format(eem), 0, Subsignal("p", Pins(_eem_pin(eem_aux, 7, "p"))), Subsignal("n", Pins(_eem_pin(eem_aux, 7, "n"))), - IOStandard("LVDS_25") + IOStandard(iostandard) ), ] return ios @classmethod - def add_std(cls, target, eem, eem_aux=None, ttl_out_cls=None): - cls.add_extension(target, eem, eem_aux) + def add_std(cls, target, eem, eem_aux=None, ttl_out_cls=None, iostandard="LVDS_25"): + cls.add_extension(target, eem, eem_aux, iostandard=iostandard) pads = target.platform.request("grabber{}_video".format(eem)) target.platform.add_period_constraint(pads.clk_p, 14.71) @@ -452,15 +452,16 @@ class Grabber(_EEM): class SUServo(_EEM): @staticmethod - def io(*eems): + def io(*eems, iostandard="LVDS_25"): assert len(eems) == 6 - return (Sampler.io(*eems[0:2]) - + Urukul.io_qspi(*eems[2:4]) - + Urukul.io_qspi(*eems[4:6])) + return (Sampler.io(*eems[0:2], iostandard=iostandard) + + Urukul.io_qspi(*eems[2:4], iostandard=iostandard) + + Urukul.io_qspi(*eems[4:6], iostandard=iostandard)) @classmethod def add_std(cls, target, eems_sampler, eems_urukul0, eems_urukul1, - t_rtt=4, clk=1, shift=11, profile=5): + t_rtt=4, clk=1, shift=11, profile=5, + iostandard="LVDS_25"): """Add a 8-channel Sampler-Urukul Servo :param t_rtt: upper estimate for clock round-trip propagation time from @@ -478,7 +479,8 @@ class SUServo(_EEM): (default: 5) """ cls.add_extension( - target, *(eems_sampler + eems_urukul0 + eems_urukul1)) + target, *(eems_sampler + eems_urukul0 + eems_urukul1), + iostandard=iostandard) eem_sampler = "sampler{}".format(eems_sampler[0]) eem_urukul0 = "urukul{}".format(eems_urukul0[0]) eem_urukul1 = "urukul{}".format(eems_urukul1[0])