forked from M-Labs/artiq
Fix 2de3770
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de17908b38
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58a0e4c97f
@ -38,7 +38,7 @@ pub fn flush_l2_cache() {
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unsafe {
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for i in 0..2 * (csr::CONFIG_L2_SIZE as usize) / 4 {
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let addr = mem::MAIN_RAM_BASE + i * 4;
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asm!("l.lwz r0, 0($1)"::"r"(addr):"r0":"volatile")
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asm!("l.lwz r13, 0(${0})"::"r"(addr):"r13":"volatile")
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}
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}
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}
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