24 Commits

Author	SHA1	Message	Date
occheung	93f3b2dfb3	mqtt_mux: add publish example	2020-09-25 10:24:18 +08:00
occheung	e17cc27cbb	main: functioning	2020-09-24 17:32:53 +08:00
occheung	e1abf87351	dds: more clk ctrl; scpi: sys_clk ctrl	2020-09-16 12:05:45 +08:00
occheung	82867178f9	fix: reduce warning	2020-09-14 17:33:50 +08:00
occheung	d78f85721f	ethernet: minimal impl for urukul as scpi device	2020-08-31 13:32:08 +08:00
occheung	4852fc54ea	cpld: detach from lib.rs	2020-08-31 09:31:56 +08:00
occheung	fa117c94bb	ethernet: separate pin dec	2020-08-27 17:09:35 +08:00
occheung	1d3ced0d16	dds: add clock control	2020-08-26 16:49:37 +08:00
occheung	38b1c7528c	dds: add register io	2020-08-26 13:18:50 +08:00
occheung	181ef5c72a	attenuator: fix reverse data	2020-08-25 12:20:24 +08:00
occheung	29abca72cd	cpld: auto invoke io update	2020-08-24 17:03:44 +08:00
occheung	9ec5698f63	migen: replace ethernet conflict pin	2020-08-24 10:57:37 +08:00
occheung	6ef122c9a1	migen: beaufity eem res struct	2020-08-23 17:17:09 +08:00
occheung	dbea9aba30	attenuator: fix return data	2020-08-21 14:18:33 +08:00
occheung	8547610661	dds: add register io	2020-08-17 12:15:11 +08:00
occheung	ccd6a1faf9	cfg_reg: add status getter	2020-08-12 12:26:15 +08:00
occheung	0543e98956	cfg_reg: add setter function	2020-08-12 11:50:24 +08:00
occheung	0df7ff71cf	cfg_reg: add bitmask macro	2020-08-11 16:51:17 +08:00
occheung	a1a10d7afe	cfg_reg: init	2020-08-11 11:29:47 +08:00
occheung	00938bcb23	attenuator: init	2020-08-11 00:07:07 +08:00
occheung	2def3ed95d	rust: changed crate structure	2020-08-10 18:06:15 +08:00
occheung	58e77ae671	cpld: basic switching capability	2020-08-09 18:46:06 +08:00
occheung	393138dc9a	migen: debug spi connection	2020-08-09 13:42:18 +08:00
occheung	7351a9d58a	rust: migrated	2020-08-07 13:36:00 +08:00