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dds: improve comment

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occheung 2020-09-29 14:21:26 +08:00
parent 7181bdc0ae
commit 3abc0c3e4e
1 changed files with 3 additions and 0 deletions
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src/dds.rs
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@ -187,6 +187,9 @@ where
} }
// Change external clock source (ref_clk) // Change external clock source (ref_clk)
// This will always provide a legitimate f_sys_clk by the following priority
// 1. Keep DDS clock tree untouched, record the new f_sys_clk
// 2. Use the default divided-by-2 clock tree, if PLL configuration becomes invalid
pub fn set_ref_clk_frequency(&mut self, f_ref_clk: f64) -> Result<(), Error<E>> { pub fn set_ref_clk_frequency(&mut self, f_ref_clk: f64) -> Result<(), Error<E>> {
// Override old reference clock frequency (ref_clk) // Override old reference clock frequency (ref_clk)
self.f_ref_clk = f_ref_clk; self.f_ref_clk = f_ref_clk;