.. |
acpki.py
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acpki: working
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2020-09-09 21:24:49 +08:00 |
analyzer.py
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analyzer: report AXI bus errors
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2020-07-20 19:51:22 +08:00 |
config.py
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refactor write_rustc_cfg_file()
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2023-09-11 11:48:19 +08:00 |
cxp_4r_fmc.py
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fmc: add cxp_4r_fmc adepter io
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2024-12-04 16:08:47 +08:00 |
cxp_downconn.py
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cxp downconn gw: add gtx up to 12.5Gbps
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2024-12-12 11:49:54 +08:00 |
cxp_frame_pipeline.py
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cxp frame pipeline: frame handling pipeline
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2025-01-09 15:56:10 +08:00 |
cxp_pipeline.py
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cxp pipeline: packet handling pipeline
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2025-01-09 15:56:10 +08:00 |
cxp_rtio.py
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temp diagrams & unused sim
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2024-12-04 16:08:47 +08:00 |
cxp_upconn.py
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cxp upconn gw: add low speed serial PHY
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2024-12-12 11:49:54 +08:00 |
cxp.py
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cxp: add PHY and pipeline
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2025-01-09 15:56:10 +08:00 |
ddmtd.py
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DDMTD: replace 1st edge to median edge deglitcher
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2024-04-29 13:05:02 +08:00 |
dma.py
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dma: report AXI bus error
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2020-07-21 12:47:20 +08:00 |
drtio_aux_controller.py
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drtio_aux_controller: support aux_buffer_count
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2024-04-24 17:12:39 +08:00 |
ebaz4205.py
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gateware: Add default TTLs to EBAZ4205 (#335)
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2024-11-16 10:40:45 +08:00 |
endianness.py
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dma: fix endianness issues
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2020-07-16 17:27:08 +08:00 |
kasli_soc.py
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allow toggling SED spread with flash config key
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2024-07-09 18:11:20 +08:00 |
test_dma.py
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RTIO/SYS Clock merge
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2023-02-17 15:52:43 +08:00 |
zc706.py
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zc706: add CXP_DEMO variant
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2025-01-09 15:56:10 +08:00 |
zynq_clocking.py
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zynq_clocking: Allow ext signal to set cur_clk csr
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2023-11-07 18:55:08 +08:00 |