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CXP upconn: add sys reset signal to pll

This commit is contained in:
morgan 2024-06-17 16:51:55 +08:00
parent cb1ec7f62a
commit d36afd6f7b
1 changed files with 1 additions and 0 deletions
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src/gateware/cxp_upconn.py
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@ -24,6 +24,7 @@ class CXP_UpConn(Module, AutoCSR):
Instance("PLLE2_ADV", Instance("PLLE2_ADV",
p_BANDWIDTH="HIGH", p_BANDWIDTH="HIGH",
o_LOCKED=pll_locked, o_LOCKED=pll_locked,
i_RST=ResetSignal("sys"),
p_CLKIN1_PERIOD=8, # ns p_CLKIN1_PERIOD=8, # ns
i_CLKIN1=ClockSignal("sys"), i_CLKIN1=ClockSignal("sys"),