9f3793c8fb
pcb: Add 3D Models
2023-11-10 17:32:29 +08:00
0b99a8f119
sch, pcb: Correct MFR/PN and optimize BOM
2023-11-10 15:18:22 +08:00
7c72afe55f
Remove old production files
2023-11-10 15:18:21 +08:00
cd679cf0da
sch: Update Title Block Info
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- rev0.3 -> rev0_3
- Correct the title of each schematics
- Update the modified time
2023-11-10 15:18:21 +08:00
35da9f8c58
scripts: Add scripts to generate production files
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- The following files can be generated from the script.
1. Zipped(Gerber, Drill, Drill Map)
2. Bom,
3. Component Placement
4. Schematics PDF
5. Step Files
2023-11-10 15:18:17 +08:00
5ad5914748
sch, pcb: exclude MHs and soldering JP from BOM
2023-11-09 15:24:07 +08:00
a30ac45c5f
pcb: Remove "designed by" silkscreen
2023-11-08 11:53:18 +08:00
13b5f661c5
pcb: Fix TEC Polarity Connections to Header
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- Fix Issue #27
2023-11-08 11:53:07 +08:00
7aa84d4d23
sch: Fix incorrect TEC polarity in thermostat
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- Fix Issue #27
2023-11-08 11:52:51 +08:00
7b5df5150f
thermostat: Fix wrong P/N in TEC Current Sense Res
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- Fix Issue #26
2023-11-08 11:13:38 +08:00
2a6ad78f51
pcb: Finish Layout for rev0_3
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- Assign MFR_PN for all Components
- schematics changes:
- drivestage: Add Switch to optionally enable Modulation Signal Termination
- Add alternate Precision Power Resistor
- Modify the RC network values at TIA LPF Output
- MCU: Add Redundant 2.54mm pitch Programming Header
- thermostat: Duplicate the power filter network for alternate Temperature ADC
2023-11-02 15:24:26 +08:00
352f8c075d
footprint: Add TL082Hx TI SOIC-8 footprint
2023-10-31 11:02:47 +08:00
0c3c8a3fd1
sch: Update power related flags and nets symbols
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- Update the symbol from the kicad 7 built-in library
- Remove ERC warnings
2023-10-31 10:29:43 +08:00
fc02f24131
sch: correct POE_VC* pins name case
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- PoE_VC* -> POE_VC*
2023-10-31 10:23:07 +08:00
caf69e4a0f
symbol: correct RJ45 VC output pin type
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- from power input to power output
2023-10-31 10:21:18 +08:00
b0525c4d74
symbol: AD7172-4 sets DNC pin to unconnected type
2023-10-30 17:40:40 +08:00
1f9b4e9900
sch: fix Temperature ADC SPI Connections
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- Fix Issue #25
2023-10-30 17:32:43 +08:00
395e104575
sch: add lpf at TEC_VSEN Buffer Output
2023-10-30 17:29:44 +08:00
86f5addbad
sch: Correct typos in TEC_~{SHDN} ports
2023-10-30 12:17:26 +08:00
f66625e431
sch: Add redundant 2.54mm SWD Header
2023-10-27 17:45:39 +08:00
fcae5b785e
sch: Correct SWD Header MF/PN and Update Footprint
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- Use Adafuit 4048 Mini SWD Headers
- Silkscreen is modified to indicate orientation of the header
2023-10-27 17:42:46 +08:00
89dab2b553
sch: Change PoE RJ45 Jack and change PM1202 Symbol
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- Use the same PoE RJ45 as sinara-hw thermostat
- Add PM1202 Power input pins (VB+, VB-)
- Remove PoE softstart circuit as PM1202 has inrush current limiting
- Add Pi Filter at the output of PM1202
2023-10-27 15:33:39 +08:00
929ff58706
sch: Set DNP for DNP components
2023-10-25 17:36:20 +08:00
57e013c9c5
sch: Support Temp ADC in alternate footprint
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- Issue #12
- Add Alternate AD7172-4BCPZ circuitry, symbol, footprint and 3D model
2023-10-25 17:36:20 +08:00
d2c80458aa
sch: Do not pass MCU RST to ETH
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- D3 -> DNP
2023-10-25 17:36:20 +08:00
f732b9944a
sch: Fix Issue #14
2023-10-25 17:36:20 +08:00
f1bda76636
sch: correct ethernet phy sigs connections to ESD
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- Pull up eth signals with 100R instead of pull down
2023-10-25 17:36:20 +08:00
3a1dce0107
sch: Tune LD- Out Series RC Network
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- R98 3R3 -> 10R
- C192 100n PPS -> DNP
- Add C199 2n2 in parallel C192
2023-10-25 17:36:20 +08:00
1fad3bf64d
sch: Tune the LD V-I Output Stage Feedback Network
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- R67 -> 0R
- C175 -> 100pF
2023-10-25 17:36:20 +08:00
e62bf3b8d6
footprint: Correct PM1202 footprint
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- enlarge courtyard and silkscreen to reflect the clearance requirement so that it can be fully seated onto the PCB
2023-10-25 17:36:20 +08:00
dfeb1ec6a8
sch: LD DAC add parallel Cap to output resistor
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- Increase the Mod_In Signal Bandwidth
- See Issue #22
2023-10-25 17:36:20 +08:00
2df59fbce9
sch: Use TL082 for PD_Mon TIA and LPF Stage
2023-10-25 17:36:20 +08:00
893f5220c6
sch: Add REF3033 for MCU ADC VREF
2023-10-25 17:36:20 +08:00
01d0e1d45b
sch: Modify dsupply freq_comp network
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- See Issue #21
2023-10-25 17:36:20 +08:00
566bf0317a
sch: Fix Issue #15
2023-10-25 17:36:14 +08:00
3ba3ef159e
sch: Add soft start to 12V PWR Jack input
2023-10-25 17:36:14 +08:00
5ffc2a1865
pcb: migrate to kicad 7
2023-10-25 17:35:58 +08:00
8e5545f9c4
sch: R13 Power Resistor change to PDY10R000F
2023-10-12 12:43:03 +08:00
fcdabaee9c
Mirgrate to kicad7
2023-10-12 12:26:04 +08:00
Alex Wong Tat Hang
ad982265b2
improve relay power circuitry
2022-09-09 14:37:19 +08:00
Alex Wong Tat Hang
3715d93d5e
clean up
2022-09-08 03:46:38 +08:00
Alex Wong Tat Hang
29cfbc9c4e
finish v2 layout
2022-09-08 03:35:59 +08:00
Alex Wong Tat Hang
be08d4518c
some layout
2022-09-06 00:15:25 +08:00
Alex Wong Tat Hang
6aa57e04a3
update palcement
2022-09-04 23:27:58 +08:00
Alex Wong Tat Hang
facb6df2cf
placement v2
2022-09-04 23:06:16 +08:00
Alex Wong Tat Hang
78c8d1f1c6
fix eth
2022-09-03 19:00:29 +08:00
Alex Wong Tat Hang
82f609d00a
sync
2022-08-31 21:11:43 +08:00
Alex Wong Tat Hang
97a0bc6a32
import sch to pcb
2022-08-25 16:03:20 +08:00
Alex Wong Tat Hang
9a156f9e73
v2 schematics, fp assignment
2022-08-25 15:33:17 +08:00
TopQuark12
98d14f6305
change LD shorting circuit
2022-08-22 13:14:02 +08:00