linuswck
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kirdy
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  • 1a4b4a2484 sch, pcb: Correct opamp input polarity of TEC_VSEN - +ve IN connects to TEC+ - -ve IN connects to TEC- rev0_3 linuswck 2023-12-19 17:23:34 +0800
  • f847cfadb4 sch, pcb: Add 0R to use TEC_VREF to bias TEC_VSEN - Optional linuswck 2023-12-19 17:08:10 +0800
  • f3f3e609e5 Update Front Panel Text Markings - Move the LF MOD and HF MOD text up by 1.5mm linuswck 2023-12-18 16:04:10 +0800
  • 80b9848539 update flake: KiCAD_BOM_Generator linuswck 2023-12-18 14:28:32 +0800
  • a2cb5ce624 sch, pcb: Add TDAC_VFB. Change 2u2 PMLCAP P/N - Connect TDAC voltage output through a RC LPF to MCU PC0(ADC123_IN10) - 2u2 PMLCAP P/N is changed to 16V version instead of 35V for lower cost linuswck 2023-12-15 10:30:02 +0800
  • 7ac52b7a1b PCB: Correct Y169010R0000T9L Footprint - Add more space between the pin holes and resistor body linuswck 2023-12-13 15:16:48 +0800
  • 901f394ab3 Correct graphical mistakes in LTC3261 symbol - no functional changes linuswck 2023-12-13 12:18:14 +0800
  • ef732cf36b sch, pcb: correct polarity of LT3094xMSE C_Set linuswck 2023-12-13 11:48:17 +0800
  • 6cd368a203 sch: Add SMA Jack to Plug Cable to BOM - Internal SMA cable connecting LD adapter and Front Panel linuswck 2023-12-13 11:26:00 +0800
  • eaea402d9c Add copper plate to LD Adapter 3D model linuswck 2023-12-12 13:05:21 +0800
  • 9e1f359d78 flake: Generate prod files with flake.nix - Generate production files with nix build . linuswck 2023-12-12 11:43:39 +0800
  • a0c1ca1c58 pcb: Update clearance rules for JLCPCB manufacturing - No layout is changed. Only copper clearance and width are modified. linuswck 2023-12-11 11:03:47 +0800
  • aa8fd2c5cb sch: Update PN and Comments linuswck 2023-12-11 11:02:38 +0800
  • 6d686d7170 sch: Place Y169010R Power Resistor - cannot find purchasable PDY10R000F Power Resistor linuswck 2023-12-11 11:02:10 +0800
  • 816e273b7a sch: Add JLCPCB M3 x 8 Screws PN linuswck 2023-12-11 10:55:50 +0800
  • b0e798a83e sch: Set the mcu 2.54mm Prog HDR to be placed linuswck 2023-12-11 10:54:34 +0800
  • 19a860fbb4 sch: Specify AD5680 MFR_PN to be -1 variant linuswck 2023-12-11 10:52:11 +0800
  • 430a67dda4 pcb: Update Front Panel 3D Model linuswck 2023-12-11 10:51:06 +0800
  • 71f2a39713 Add Front Panel Mechanical Design and Drawings - Complete the Assembly in FreeCAD - Add Technical Drawings, Assembly Drawings, 3D model for production - Update text markings on KiCad linuswck 2023-12-11 10:50:29 +0800
  • 3b7fbdb2be pcb: Update PN and properties of symbols linuswck 2023-11-30 16:13:57 +0800
  • 8b3d5d8e44 sch: Not to include TPs in BOM. Add prod comments - LTC6655 Vref adds production comments linuswck 2023-11-30 15:59:33 +0800
  • 83bd5e9a03 Front Panel: Relocate markings to diff layers - Move the markings to different layers for generating prod docs - Add comments in the drawings pdf linuswck 2023-11-30 15:00:54 +0800
  • cc64790270 pcb: relocate programming hdrs - prev locations block Internal SMA cable linuswck 2023-11-30 14:55:15 +0800
  • 56ef8302a7 sch: Correct Front Panel Kit MRF/PN & Value typo linuswck 2023-11-30 14:53:01 +0800
  • 007ba75003 pcb: Add GND and via fencing for Mod_IN signal linuswck 2023-11-30 11:28:18 +0800
  • 401802709e pcb: Relocate programming hdrs to an accessible place - Even after the MCU EXT mezzanine is installed linuswck 2023-11-30 11:11:17 +0800
  • 66b6cd28d5 sch: Add install Instructions for Power Resistor linuswck 2023-11-30 11:10:20 +0800
  • c053eca22a Add Manufacturer into PM1202's Value & Comment linuswck 2023-11-29 16:37:35 +0800
  • 76480a3679 Add Front Panel MFR_PN linuswck 2023-11-29 16:32:18 +0800
  • 08133e5e95 sch, pcb: Add TAN Caps to all LT304x SET Pin - Prevent noise due to microphonics to be amplified by internal Amp - Remove the input TAN Caps as LT304x PSRR is very good - Replace TAN Caps in the 12V input side to be ELEC Cap - Save cost linuswck 2023-11-29 15:04:31 +0800
  • 74524b70e4 Scripts: Grab correct KICAD7_3DMODEL_DIR now - Todo: Use default.nix or flake.nix to setup the path linuswck 2023-11-29 15:01:30 +0800
  • 13720b3ccc Reassign Reference Designators for all Symbols linuswck 2023-11-29 10:46:07 +0800
  • f558f62313 sch: Add Mounting Screw Symbol and MFR/PN linuswck 2023-11-28 12:45:19 +0800
  • a8ac943190 Cleanup and Update Modification Date linuswck 2023-11-27 17:40:03 +0800
  • 2612acc9f7 Scripts: Comment Filed is included in the BOM linuswck 2023-11-27 11:36:51 +0800
  • 06a00befeb 3D: Update 3D models of KIrdy LD Adapter linuswck 2023-11-27 11:36:14 +0800
  • 1b7940871b sch, pcb: Add 12V & Mounting holes to MCU EXT HDR linuswck 2023-11-27 11:35:56 +0800
  • 83506fd3c6 sch, pcb: add tantalum C0G Caps for 8V out LT3045 linuswck 2023-11-24 15:28:48 +0800
  • f24f037348 sch, pcb: Change kirdy LD adpter connectors - Add two extra mounting holes for kirdy LD adapter - Update kirdy LD adapter 3D model - Update the PCB layout accordingly linuswck 2023-11-24 15:18:34 +0800
  • 95494ee031 sch, pcb: Add LPF and Buffer for TEC VREF linuswck 2023-11-23 11:41:38 +0800
  • e7a7eee202 sch, pcb: Remove X7R, X5R at input LT304x - Reduce the number of Tantalum Capacitor Used - Replace some non critical ones with Electrolytic Caps linuswck 2023-11-22 17:44:09 +0800
  • f29c460e72 Add: Footprints and Step Model for Caps - SMD ELEC: 865080345012 - SMD C0G Ceramic GRMJN65C1H104JE01J linuswck 2023-11-22 17:41:57 +0800
  • 5f7743698e pcb: Add reference designators for connectors, SWs - SMA Connector, USB Type C, Power Jack, RJ45 - MCU Programming Headers and Boot 0 Headers - Termination Resistor SW, Modulation Depth SW linuswck 2023-11-21 16:55:51 +0800
  • 43903708c3 sch, pcb: Replace FB of -6V +15V LDO with inductor - Build a Pi LPF on the input side linuswck 2023-11-21 16:46:22 +0800
  • 24637b4216 sch, pcb: Add alternate footprint for LTC6655 Vref linuswck 2023-11-21 15:34:06 +0800
  • 2cbab29c4e sch, pcb: Add LEDs and TPs to Critical Power Rails linuswck 2023-11-21 13:30:36 +0800
  • c59eccaa7d sch, pcb: add 0R for TEC Vref Ouput - For debugging if needed linuswck 2023-11-21 10:42:27 +0800
  • db54e6cfa8 sch, pcb:Edit PCB shape for connectors to protrude - Connectors now protrude the front panel - Align the connectors by the outline generated from 3D Model - Update the front panel symbol to include the two mounting holes linuswck 2023-11-20 17:40:23 +0800
  • e0989a61f2 Add Front Panel FreeCAD Assembly - Static Handle - PCB Brackets - Kirdy Front Panel Cutout linuswck 2023-11-20 17:33:06 +0800
  • 13a90dd642 3D_Model: Update 204-121ST linuswck 2023-11-20 17:28:31 +0800
  • b901f84d0a sch, pcb: Add PWR, POE_PWR netclasses linuswck 2023-11-20 11:10:49 +0800
  • 20198f5eab drc: Check PWR nets clearance on pri and sec sides - Pri: PoE PWR nets - Sec: PWR nets like GND, 3V3 etc linuswck 2023-11-20 11:09:48 +0800
  • 47a30da9b1 Port front panel markings design to Kicad - Front panel text markings can now be modified with Kicad linuswck 2023-11-17 15:42:30 +0800
  • de7c27c21f sch, pcb: Add mounting holes for Kirdy LD Adapter linuswck 2023-11-15 16:42:59 +0800
  • 41db8612c0 pcb: relocate switches for better accessibility - modulation depth SW and termination SW are relocated linuswck 2023-11-15 13:33:09 +0800
  • de3e034c7a Add Front Panel, Kirdy LD Adapter 3D models - Update sch, pcb, sym lib, footrprint lib - Position of Kirdy LD Adapter is relocated so that it is symmetric linuswck 2023-11-15 11:49:53 +0800
  • 9f3793c8fb pcb: Add 3D Models linuswck 2023-11-10 17:32:29 +0800
  • 0b99a8f119 sch, pcb: Correct MFR/PN and optimize BOM linuswck 2023-11-09 17:22:17 +0800
  • 7c72afe55f Remove old production files linuswck 2023-11-09 14:37:25 +0800
  • cd679cf0da sch: Update Title Block Info - rev0.3 -> rev0_3 - Correct the title of each schematics - Update the modified time linuswck 2023-11-09 14:32:44 +0800
  • 35da9f8c58 scripts: Add scripts to generate production files - The following files can be generated from the script. 1. Zipped(Gerber, Drill, Drill Map) 2. Bom, 3. Component Placement 4. Schematics PDF 5. Step Files linuswck 2023-11-09 13:19:32 +0800
  • 5ad5914748 sch, pcb: exclude MHs and soldering JP from BOM linuswck 2023-11-08 17:14:43 +0800
  • a30ac45c5f pcb: Remove "designed by" silkscreen linuswck 2023-11-08 11:48:21 +0800
  • 13b5f661c5 pcb: Fix TEC Polarity Connections to Header - Fix Issue #27 linuswck 2023-11-08 11:45:28 +0800
  • 7aa84d4d23 sch: Fix incorrect TEC polarity in thermostat - Fix Issue #27 linuswck 2023-11-08 11:33:17 +0800
  • 7b5df5150f thermostat: Fix wrong P/N in TEC Current Sense Res - Fix Issue #26 linuswck 2023-11-08 11:07:17 +0800
  • 2a6ad78f51 pcb: Finish Layout for rev0_3 - Assign MFR_PN for all Components - schematics changes: - drivestage: Add Switch to optionally enable Modulation Signal Termination - Add alternate Precision Power Resistor - Modify the RC network values at TIA LPF Output - MCU: Add Redundant 2.54mm pitch Programming Header - thermostat: Duplicate the power filter network for alternate Temperature ADC linuswck 2023-11-01 17:36:15 +0800
  • 352f8c075d footprint: Add TL082Hx TI SOIC-8 footprint linuswck 2023-10-31 11:02:47 +0800
  • 0c3c8a3fd1 sch: Update power related flags and nets symbols - Update the symbol from the kicad 7 built-in library - Remove ERC warnings linuswck 2023-10-31 10:29:43 +0800
  • fc02f24131 sch: correct POE_VC* pins name case - PoE_VC* -> POE_VC* linuswck 2023-10-31 10:23:07 +0800
  • caf69e4a0f symbol: correct RJ45 VC output pin type - from power input to power output linuswck 2023-10-31 10:18:31 +0800
  • b0525c4d74 symbol: AD7172-4 sets DNC pin to unconnected type linuswck 2023-10-30 17:40:40 +0800
  • 1f9b4e9900 sch: fix Temperature ADC SPI Connections - Fix Issue #25 linuswck 2023-10-30 17:32:43 +0800
  • 395e104575 sch: add lpf at TEC_VSEN Buffer Output linuswck 2023-10-30 17:29:44 +0800
  • 86f5addbad sch: Correct typos in TEC_~{SHDN} ports linuswck 2023-10-30 12:17:26 +0800
  • f66625e431 sch: Add redundant 2.54mm SWD Header linuswck 2023-10-27 17:45:39 +0800
  • fcae5b785e sch: Correct SWD Header MF/PN and Update Footprint - Use Adafuit 4048 Mini SWD Headers - Silkscreen is modified to indicate orientation of the header linuswck 2023-10-27 17:42:46 +0800
  • 89dab2b553 sch: Change PoE RJ45 Jack and change PM1202 Symbol - Use the same PoE RJ45 as sinara-hw thermostat - Add PM1202 Power input pins (VB+, VB-) - Remove PoE softstart circuit as PM1202 has inrush current limiting - Add Pi Filter at the output of PM1202 linuswck 2023-10-27 15:33:39 +0800
  • 929ff58706 sch: Set DNP for DNP components linuswck 2023-10-25 17:19:03 +0800
  • 57e013c9c5 sch: Support Temp ADC in alternate footprint - Issue #12 - Add Alternate AD7172-4BCPZ circuitry, symbol, footprint and 3D model linuswck 2023-10-25 17:01:57 +0800
  • d2c80458aa sch: Do not pass MCU RST to ETH - D3 -> DNP linuswck 2023-10-25 16:59:23 +0800
  • f732b9944a sch: Fix Issue #14 linuswck 2023-10-25 15:38:56 +0800
  • f1bda76636 sch: correct ethernet phy sigs connections to ESD - Pull up eth signals with 100R instead of pull down linuswck 2023-10-25 13:32:03 +0800
  • 3a1dce0107 sch: Tune LD- Out Series RC Network - R98 3R3 -> 10R - C192 100n PPS -> DNP - Add C199 2n2 in parallel C192 linuswck 2023-10-25 12:36:04 +0800
  • 1fad3bf64d sch: Tune the LD V-I Output Stage Feedback Network - R67 -> 0R - C175 -> 100pF linuswck 2023-10-25 12:30:32 +0800
  • e62bf3b8d6 footprint: Correct PM1202 footprint - enlarge courtyard and silkscreen to reflect the clearance requirement so that it can be fully seated onto the PCB linuswck 2023-10-24 12:30:05 +0800
  • dfeb1ec6a8 sch: LD DAC add parallel Cap to output resistor - Increase the Mod_In Signal Bandwidth - See Issue #22 linuswck 2023-10-24 10:37:36 +0800
  • 2df59fbce9 sch: Use TL082 for PD_Mon TIA and LPF Stage linuswck 2023-10-13 17:27:18 +0800
  • 893f5220c6 sch: Add REF3033 for MCU ADC VREF linuswck 2023-10-20 13:29:05 +0800
  • 01d0e1d45b sch: Modify dsupply freq_comp network - See Issue #21 linuswck 2023-10-20 13:26:38 +0800
  • 566bf0317a sch: Fix Issue #15 linuswck 2023-10-12 16:55:13 +0800
  • 3ba3ef159e sch: Add soft start to 12V PWR Jack input linuswck 2023-10-12 14:43:21 +0800
  • 5ffc2a1865 pcb: migrate to kicad 7 linuswck 2023-10-12 14:40:19 +0800
  • 8e5545f9c4 sch: R13 Power Resistor change to PDY10R000F linuswck 2023-10-12 12:43:03 +0800
  • fcdabaee9c Mirgrate to kicad7 linuswck 2023-10-12 12:26:04 +0800
  • ad982265b2 improve relay power circuitry master Alex Wong Tat Hang 2022-09-09 14:37:19 +0800
  • 3715d93d5e clean up Alex Wong Tat Hang 2022-09-08 03:46:38 +0800
  • 29cfbc9c4e finish v2 layout Alex Wong Tat Hang 2022-09-08 03:35:59 +0800
  • be08d4518c some layout Alex Wong Tat Hang 2022-09-06 00:15:25 +0800
  • 6aa57e04a3 update palcement Alex Wong Tat Hang 2022-09-04 23:27:58 +0800