Commit Graph

944 Commits

Author SHA1 Message Date
cfc4cb382d dependencies: hal ref is on master now [nfc] 2021-02-15 08:53:55 +01:00
5fc45a659b lockin-external: comment style [nfc] 2021-02-15 08:51:19 +01:00
a926c3554b
Merge pull request #268 from dnadlinger/json-020
Upgrade to serde-json-core v0.2.0
2021-02-15 08:04:44 +01:00
b581a016ce lockin: redundant new 2021-02-14 17:55:01 +01:00
David Nadlinger
4130292706 Upgrade to serde-json-core v0.2.0
This also fixes the network interface for writing IIR coefficients.
2021-02-13 00:07:15 +00:00
16c986ab1b
Merge pull request #267 from quartiq/rj/lowpass2
lowpass2
2021-02-12 12:23:26 +01:00
8918952b96 complex: lint 2021-02-12 12:06:00 +01:00
71c6e52f4d complex: add some traits 2021-02-12 12:03:53 +01:00
a6d4099ed3 lowpass: expose natural gain, add bias 2021-02-12 11:06:59 +01:00
67f052c0c9 lockin: add rounding bias 2021-02-12 11:05:50 +01:00
32b7058b47 lockin: 2nd order lowpass 2021-02-11 23:15:32 +01:00
b49f0a2eb9 complex: log2, update bins 2021-02-11 18:14:28 +01:00
3ae0b710bc lowpass: reimplement better 2021-02-11 14:30:05 +01:00
c89f348f5e
Merge pull request #266 from quartiq/rj/lowpass
new lowpass
2021-02-10 14:25:46 +01:00
a144c099b2 lowpass: fmt 2021-02-10 14:10:28 +01:00
beeb43bf8b lowpass: robustify 2021-02-10 13:44:10 +01:00
8d68504026 lowpass: symmetric code 2021-02-10 13:31:41 +01:00
13b47556fd lowpass: clippy 2021-02-10 13:27:56 +01:00
30c2c2aac2 lowpass: i32, no multiplies 2021-02-10 11:39:19 +01:00
208ba8379a dsp, lockin: use cascaded 1st order lowpasses 2021-02-09 20:37:46 +01:00
ae43f60d60
Merge pull request #263 from quartiq/rj/deglitch-misc
deglitch timer input, miscellaneous changes
2021-02-09 15:39:24 +01:00
03cbd99aee
Merge pull request #265 from quartiq/rs/timer-input-filter-config
Adding support for input capture prefilter configuration
2021-02-09 15:03:30 +01:00
724768a72e Adding safety docs 2021-02-09 14:37:49 +01:00
2e358dea26 Adding support for input capture prefilter configuration 2021-02-09 14:36:50 +01:00
31781a9d0e iir_int: rounding bias 2021-02-09 12:17:48 +01:00
611bd3e855 ad9959/pounder: tweaks
* make a trait public
* use self-test
* this hasn't been tested
2021-02-08 15:24:52 +01:00
1b46f081c1 better formatting 2021-02-08 11:26:58 +01:00
9b6ab29eb7 update cargosha256 2021-02-08 09:56:42 +08:00
deed11f110 lockin-external: simplify 2021-02-05 18:59:22 +01:00
47d8a74524 ci: simplify nightly 2021-02-04 17:01:18 +01:00
0343e5d8ab pounder timer is u16 2021-02-04 16:51:34 +01:00
f19988a1bd up the sample rate 2021-02-04 15:42:45 +01:00
2d492055f3 pounder stamper: overflow at u32 boundary 2021-02-04 15:42:29 +01:00
473bdaa9bc iir_int: use f64 for extreme filters 2021-02-04 15:21:05 +01:00
8314844aeb pounder: moved SAMPLE_BUFFER_SIZE 2021-02-04 13:36:24 +01:00
d32378e6c4 lockin-external: ignore timestamps related to capture overflows 2021-02-04 12:48:58 +01:00
f47ee38d31 move sample ticks and buffer size to design parameters 2021-02-04 12:48:25 +01:00
7ce90c4d31 input stamper: add deglitching 2021-02-04 12:47:35 +01:00
f250e036ca rpll: simplify parameters, add one test 2021-02-04 12:46:33 +01:00
91f16c2961 Adding working example 2021-02-03 19:55:58 +01:00
bors[bot]
5951a0d41d
Merge #262
262: core_intrinsics attr need to be in the lib crate r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
2021-02-03 17:15:46 +00:00
4dfe16fce8 ci: don't save binaries 2021-02-03 18:14:42 +01:00
1167c7693d bors: depend on test 2021-02-03 18:01:24 +01:00
4d37a5483f ci: add release automation 2021-02-03 17:59:44 +01:00
5c8f316160
Update ci.yml 2021-02-03 17:24:06 +01:00
748a02fc4f ci: slim down
* build binaries in one go
* have bors look at specific jobs and not meta-jobs
* don't do objdump anymore (gdb/embed handle elfs)
* include a nightly build
2021-02-03 16:51:35 +01:00
c557348523 core_intrinsics attr need to be in the lib crate 2021-02-03 15:26:13 +01:00
738516eedb Adding broken example 2021-02-03 15:13:37 +01:00
5945cfca75
Merge pull request #258 from vertigo-designs/feature/input-capture-fixes
Updating input capture for timers
2021-02-03 14:54:55 +01:00
a44804f3c1
Merge pull request #257 from quartiq/rj/bump-hal-smoltcp
bump HAL and smoltcp
2021-02-03 14:46:27 +01:00