lockin: dma fence

This commit is contained in:
Robert Jördens 2021-06-01 14:49:51 +02:00
parent b90f4ad185
commit f8fa297b20

View File

@ -2,6 +2,8 @@
#![no_std] #![no_std]
#![no_main] #![no_main]
use core::sync::atomic::{fence, Ordering};
use embedded_hal::digital::v2::InputPin; use embedded_hal::digital::v2::InputPin;
use serde::Deserialize; use serde::Deserialize;
@ -214,6 +216,9 @@ const APP: () = {
let adc_samples = [adc0, adc1]; let adc_samples = [adc0, adc1];
let mut dac_samples = [dac0, dac1]; let mut dac_samples = [dac0, dac1];
// Preserve instruction and data ordering w.r.t. DMA flag access.
fence(Ordering::SeqCst);
let output: Complex<i32> = adc_samples[0] let output: Complex<i32> = adc_samples[0]
.iter() .iter()
// Zip in the LO phase. // Zip in the LO phase.
@ -252,6 +257,9 @@ const APP: () = {
telemetry.dacs = telemetry.dacs =
[DacCode(dac_samples[0][0]), DacCode(dac_samples[1][0])]; [DacCode(dac_samples[0][0]), DacCode(dac_samples[1][0])];
// Preserve instruction and data ordering w.r.t. DMA flag access.
fence(Ordering::SeqCst);
}); });
} }