Merge pull request #234 from vertigo-designs/feature/multi-app-support

Feature/multi app support
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Robert Jördens 2021-01-20 14:09:47 +01:00 committed by GitHub
commit a31c9a5a7a
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3 changed files with 24 additions and 20 deletions

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@ -12,20 +12,8 @@ use rtic::cyccnt::{Instant, U32Ext};
use heapless::{consts::*, String}; use heapless::{consts::*, String};
// The number of ticks in the ADC sampling timer. The timer runs at 100MHz, so the step size is use stabilizer::{hardware, server};
// equal to 10ns per tick.
// Currently, the sample rate is equal to: Fsample = 100/256 MHz = 390.625 KHz
const ADC_SAMPLE_TICKS: u16 = 256;
// The desired ADC sample processing buffer size.
const SAMPLE_BUFFER_SIZE: usize = 8;
// The number of cascaded IIR biquads per channel. Select 1 or 2!
const IIR_CASCADE_LENGTH: usize = 1;
#[macro_use]
mod server;
mod hardware;
use dsp::iir; use dsp::iir;
use hardware::{Adc0Input, Adc1Input, Dac0Output, Dac1Output, AFE0, AFE1}; use hardware::{Adc0Input, Adc1Input, Dac0Output, Dac1Output, AFE0, AFE1};
@ -34,6 +22,9 @@ const SCALE: f32 = ((1 << 15) - 1) as f32;
const TCP_RX_BUFFER_SIZE: usize = 8192; const TCP_RX_BUFFER_SIZE: usize = 8192;
const TCP_TX_BUFFER_SIZE: usize = 8192; const TCP_TX_BUFFER_SIZE: usize = 8192;
// The number of cascaded IIR biquads per channel. Select 1 or 2!
const IIR_CASCADE_LENGTH: usize = 1;
#[rtic::app(device = stm32h7xx_hal::stm32, peripherals = true, monotonic = rtic::cyccnt::CYCCNT)] #[rtic::app(device = stm32h7xx_hal::stm32, peripherals = true, monotonic = rtic::cyccnt::CYCCNT)]
const APP: () = { const APP: () = {
struct Resources { struct Resources {
@ -162,7 +153,7 @@ const APP: () = {
} else { } else {
server.poll(socket, |req| { server.poll(socket, |req| {
info!("Got request: {:?}", req); info!("Got request: {:?}", req);
route_request!(req, stabilizer::route_request!(req,
readable_attributes: [ readable_attributes: [
"stabilizer/iir/state": (|| { "stabilizer/iir/state": (|| {
let state = c.resources.iir_state.lock(|iir_state| let state = c.resources.iir_state.lock(|iir_state|

15
src/lib.rs Normal file
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@ -0,0 +1,15 @@
#![no_std]
#[macro_use]
extern crate log;
pub mod hardware;
pub mod server;
// The number of ticks in the ADC sampling timer. The timer runs at 100MHz, so the step size is
// equal to 10ns per tick.
// Currently, the sample rate is equal to: Fsample = 100/256 MHz = 390.625 KHz
const ADC_SAMPLE_TICKS: u16 = 256;
// The desired ADC sample processing buffer size.
const SAMPLE_BUFFER_SIZE: usize = 8;

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@ -1,14 +1,12 @@
use heapless::{consts::*, String, Vec};
use core::fmt::Write; use core::fmt::Write;
use heapless::{consts::*, String, Vec};
use serde::{Deserialize, Serialize}; use serde::{Deserialize, Serialize};
use serde_json_core::{de::from_slice, ser::to_string}; use serde_json_core::{de::from_slice, ser::to_string};
use super::iir;
use smoltcp as net; use smoltcp as net;
use dsp::iir;
#[macro_export]
macro_rules! route_request { macro_rules! route_request {
($request:ident, ($request:ident,
readable_attributes: [$($read_attribute:tt: $getter:tt),*], readable_attributes: [$($read_attribute:tt: $getter:tt),*],