itcm: implement in rust and execute during setup()

This commit is contained in:
Robert Jördens 2021-05-14 17:20:08 +02:00
parent bd8b3cd6f3
commit 4d5f1ab5e9
7 changed files with 30 additions and 60 deletions

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@ -16,7 +16,6 @@ jobs:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v2
- run: sudo apt install gcc-arm-none-eabi
- uses: actions-rs/toolchain@v1
with:
toolchain: stable
@ -52,7 +51,6 @@ jobs:
features: nightly
steps:
- uses: actions/checkout@v2
- run: sudo apt install gcc-arm-none-eabi
- uses: actions-rs/toolchain@v1
with:
toolchain: ${{ matrix.toolchain }}

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@ -12,7 +12,6 @@ jobs:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v2
- run: sudo apt install gcc-arm-none-eabi
- uses: actions-rs/toolchain@v1
with:
toolchain: stable

7
Cargo.lock generated
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@ -102,12 +102,6 @@ dependencies = [
"rustc_version",
]
[[package]]
name = "cc"
version = "1.0.67"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "e3c69b077ad434294d3ce9f1f6143a2a4b89a8a2d54ef813d85003a4fd1137fd"
[[package]]
name = "cfg-if"
version = "1.0.0"
@ -756,7 +750,6 @@ version = "0.5.0"
dependencies = [
"ad9959",
"asm-delay",
"cc",
"cortex-m 0.7.2",
"cortex-m-rt",
"cortex-m-rtic",

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@ -58,9 +58,6 @@ rev = "61933f857a"
features = ["stm32h743v", "rt", "unproven", "ethernet", "quadspi"]
version = "0.9.0"
[build-dependencies]
cc = "1.0"
[patch.crates-io.cortex-m-rt]
git = "https://github.com/rust-embedded/cortex-m-rt.git"
rev = "a2e3ad5"

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@ -1,6 +1,3 @@
fn main() {
println!("cargo:rerun-if-changed=memory.x");
cc::Build::new().file("src/startup.S").compile("startup");
println!("cargo:rerun-if-changed=src/startup.S");
}

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@ -105,6 +105,32 @@ pub struct PounderDevices {
/// Static storage for the ethernet DMA descriptor ring.
static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
/// Setup ITCM and load its code from flash
unsafe fn setup_itcm() {
extern "C" {
static mut __sitcm: u32;
static mut __eitcm: u32;
static mut __siitcm: u32;
}
use core::{ptr, slice, sync::atomic};
// ITCM is enabled on reset on our CPU but might not be on others.
// Keep for completeness.
const ITCMCR: *mut u32 = 0xE000_EF90usize as _;
ptr::write_volatile(ITCMCR, ptr::read_volatile(ITCMCR) | 1);
atomic::fence(atomic::Ordering::SeqCst);
let len =
(&__eitcm as *const u32).offset_from(&__sitcm as *const _) as usize;
let dst = slice::from_raw_parts_mut(&mut __sitcm as *mut _, len);
let src = slice::from_raw_parts(&__siitcm as *const _, len);
dst.copy_from_slice(src);
atomic::fence(atomic::Ordering::SeqCst);
cortex_m::asm::dsb();
cortex_m::asm::isb();
}
/// Configure the stabilizer hardware for operation.
///
/// # Args
@ -160,6 +186,10 @@ pub fn setup(
log::info!("starting...");
}
unsafe {
setup_itcm();
}
// Set up the system timer for RTIC scheduling.
{
let tim15 =

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@ -1,44 +0,0 @@
.cfi_sections .debug_frame
# .thumb
.section .text.pre_init, "ax"
.globl __pre_init
.type __pre_init,%function
.thumb_func
.cfi_startproc
__pre_init:
# Enable ITCM and DTCM
ldr r0, =1
ldr r1, =0xE000EF90
ldr r2, [r1]
# Set ITCMCR.EN
orr r2, r2, r0
str r2, [r1]
ldr r1, =0xE000EF94
ldr r2, [r1]
# Set DTCMCR.EN
orr r2, r2, r0
str r2, [r1]
dsb
isb
# Analogous to cortex-m-rt Reset code for .data copying.
# Initialise .itcm code. `__sitcm`, `__siitcm`, and `__eitcm` come from the
# linker script. Copy from r2 into r0 until r0 reaches r1.
ldr r0,=__sitcm
ldr r1,=__eitcm
ldr r2,=__siitcm
1:
cmp r1, r0
beq 2f
# load 1 word from r2 to r3, inc r2
ldm r2!, {r3}
# store 1 word from r3 to r0, inc r0
stm r0!, {r3}
b 1b
2:
dsb
isb
bx lr
.cfi_endproc