2020-04-29 01:07:19 +08:00
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use super::error::Error;
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2020-04-29 19:00:29 +08:00
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use super::DdsChannel;
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2020-04-29 01:07:19 +08:00
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pub trait AttenuatorInterface {
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2020-04-29 19:00:29 +08:00
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fn modify(&mut self, attenuation: f32, channel: DdsChannel) -> Result<f32, Error> {
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2020-06-03 16:36:35 +08:00
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if attenuation > 31.5 || attenuation < 0.0 {
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2020-04-29 01:07:19 +08:00
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return Err(Error::Bounds);
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}
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2020-06-03 16:36:35 +08:00
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// Calculate the attenuation code to program into the attenuator. The attenuator uses a
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// code where the LSB is 0.5 dB.
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2020-04-29 01:07:19 +08:00
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let attenuation_code = (attenuation * 2.0) as u8;
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// Read all the channels, modify the channel of interest, and write all the channels back.
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// This ensures the staging register and the output register are always in sync.
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let mut channels = [0_u8; 4];
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self.read_all(&mut channels)?;
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2020-06-03 16:36:35 +08:00
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// The lowest 2 bits of the 8-bit shift register on the attenuator are ignored. Shift the
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// attenuator code into the upper 6 bits of the register value. Note that the attenuator
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// treats inputs as active-low, so the code is inverted before writing.
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channels[channel as usize] = !attenuation_code.wrapping_shl(2);
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2020-04-29 01:07:19 +08:00
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self.write_all(&channels)?;
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// Finally, latch the output of the updated channel to force it into an active state.
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self.latch(channel)?;
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Ok(attenuation_code as f32 / 2.0)
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}
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2020-04-29 19:00:29 +08:00
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fn read(&mut self, channel: DdsChannel) -> Result<f32, Error> {
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2020-04-29 01:07:19 +08:00
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let mut channels = [0_u8; 4];
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// Reading the data always shifts data out of the staging registers, so we perform a
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// duplicate write-back to ensure the staging register is always equal to the output
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// register.
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self.read_all(&mut channels)?;
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self.write_all(&channels)?;
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2020-06-03 16:36:35 +08:00
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// The attenuation code is stored in the upper 6 bits of the register, where each LSB
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// represents 0.5 dB. The attenuator stores the code as active-low, so inverting the result
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// (before the shift) has the affect of transforming the bits of interest (and the
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// dont-care bits) into an active-high state and then masking off the don't care bits. If
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// the shift occurs before the inversion, the upper 2 bits (which would then be don't
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// care) would contain erroneous data.
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let attenuation_code = (!channels[channel as usize]).wrapping_shr(2);
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2020-04-29 01:07:19 +08:00
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2020-06-03 16:36:35 +08:00
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// Convert the desired channel code into dB of attenuation.
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2020-04-29 01:07:19 +08:00
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Ok(attenuation_code as f32 / 2.0)
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}
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fn reset(&mut self) -> Result<(), Error>;
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2020-04-29 19:00:29 +08:00
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fn latch(&mut self, channel: DdsChannel) -> Result<(), Error>;
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2020-04-29 01:07:19 +08:00
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fn read_all(&mut self, channels: &mut [u8; 4]) -> Result<(), Error>;
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fn write_all(&mut self, channels: &[u8; 4]) -> Result<(), Error>;
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}
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