Updating code after review feedback
This commit is contained in:
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6792ab5469
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13cd0ad636
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@ -237,12 +237,9 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "mcp23017"
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version = "0.1.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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source = "git+https://github.com/mrd0ll4r/mcp23017.git#a3d072754abca60a92ece820f7cfb767a0c11669"
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dependencies = [
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"cast 0.2.3 (registry+https://github.com/rust-lang/crates.io-index)",
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"embedded-hal 0.2.3 (registry+https://github.com/rust-lang/crates.io-index)",
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"generic-array 0.13.2 (registry+https://github.com/rust-lang/crates.io-index)",
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"nb 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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@ -372,7 +369,7 @@ dependencies = [
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"embedded-hal 0.2.3 (registry+https://github.com/rust-lang/crates.io-index)",
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"heapless 0.5.4 (registry+https://github.com/rust-lang/crates.io-index)",
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"log 0.4.8 (registry+https://github.com/rust-lang/crates.io-index)",
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"mcp23017 0.1.1 (registry+https://github.com/rust-lang/crates.io-index)",
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"mcp23017 0.1.1 (git+https://github.com/mrd0ll4r/mcp23017.git)",
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"nb 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
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"panic-halt 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"panic-semihosting 0.5.3 (registry+https://github.com/rust-lang/crates.io-index)",
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@ -508,7 +505,7 @@ dependencies = [
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"checksum indexmap 1.3.2 (registry+https://github.com/rust-lang/crates.io-index)" = "076f042c5b7b98f31d205f1249267e12a6518c1481e9dae9764af19b707d2292"
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"checksum log 0.4.8 (registry+https://github.com/rust-lang/crates.io-index)" = "14b6052be84e6b71ab17edffc2eeabf5c2c3ae1fdb464aae35ac50c67a44e1f7"
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"checksum managed 0.7.1 (registry+https://github.com/rust-lang/crates.io-index)" = "fdcec5e97041c7f0f1c5b7d93f12e57293c831c646f4cc7a5db59460c7ea8de6"
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"checksum mcp23017 0.1.1 (registry+https://github.com/rust-lang/crates.io-index)" = "7f4854484a74b626165c3f3cf5e15bfee2898c6b4d6eccc3ed5ee634850af4dd"
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"checksum mcp23017 0.1.1 (git+https://github.com/mrd0ll4r/mcp23017.git)" = "<none>"
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"checksum nb 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)" = "b1411551beb3c11dedfb0a90a0fa256b47d28b9ec2cdff34c25a2fa59e45dbdc"
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"checksum panic-halt 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)" = "de96540e0ebde571dc55c73d60ef407c653844e6f9a1e2fdbd40c07b9252d812"
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"checksum panic-semihosting 0.5.3 (registry+https://github.com/rust-lang/crates.io-index)" = "c03864ac862876c16a308f5286f4aa217f1a69ac45df87ad3cd2847f818a642c"
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@ -39,7 +39,9 @@ cortex-m-rtfm = "0.5"
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embedded-hal = "0.2.3"
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nb = "0.1.2"
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asm-delay = "0.7.0"
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mcp23017 = "0.1.1"
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[dependencies.mcp23017]
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git = "https://github.com/mrd0ll4r/mcp23017.git"
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[dependencies.smoltcp]
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version = "0.6"
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27
src/afe.rs
27
src/afe.rs
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@ -30,23 +30,16 @@ where
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}
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pub fn set_gain(&mut self, gain: Gain) {
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match gain {
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Gain::G1 => {
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self.a0.set_low().unwrap();
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self.a1.set_low().unwrap();
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},
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Gain::G2 => {
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self.a0.set_high().unwrap();
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self.a1.set_low().unwrap();
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},
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Gain::G5 => {
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self.a0.set_low().unwrap();
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self.a1.set_high().unwrap();
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},
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Gain::G10 => {
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self.a0.set_high().unwrap();
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self.a1.set_high().unwrap();
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},
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if (gain as u8 & 0b01) != 0 {
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self.a0.set_high().unwrap();
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} else {
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self.a0.set_low().unwrap();
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}
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if (gain as u8 & 0b10) != 0 {
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self.a1.set_high().unwrap()
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} else {
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self.a1.set_low().unwrap();
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}
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}
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@ -3,18 +3,23 @@ use super::DdsChannel;
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pub trait AttenuatorInterface {
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fn modify(&mut self, attenuation: f32, channel: DdsChannel) -> Result<f32, Error> {
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if attenuation > 31.5 {
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if attenuation > 31.5 || attenuation < 0.0 {
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return Err(Error::Bounds);
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}
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// Calculate the attenuation code to program into the attenuator.
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// Calculate the attenuation code to program into the attenuator. The attenuator uses a
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// code where the LSB is 0.5 dB.
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let attenuation_code = (attenuation * 2.0) as u8;
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// Read all the channels, modify the channel of interest, and write all the channels back.
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// This ensures the staging register and the output register are always in sync.
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let mut channels = [0_u8; 4];
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self.read_all(&mut channels)?;
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channels[channel as usize] = attenuation_code;
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// The lowest 2 bits of the 8-bit shift register on the attenuator are ignored. Shift the
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// attenuator code into the upper 6 bits of the register value. Note that the attenuator
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// treats inputs as active-low, so the code is inverted before writing.
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channels[channel as usize] = !attenuation_code.wrapping_shl(2);
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self.write_all(&channels)?;
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// Finally, latch the output of the updated channel to force it into an active state.
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@ -32,9 +37,15 @@ pub trait AttenuatorInterface {
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self.read_all(&mut channels)?;
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self.write_all(&channels)?;
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// Convert the desired channel code into dB of attenuation.
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let attenuation_code = channels[channel as usize];
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// The attenuation code is stored in the upper 6 bits of the register, where each LSB
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// represents 0.5 dB. The attenuator stores the code as active-low, so inverting the result
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// (before the shift) has the affect of transforming the bits of interest (and the
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// dont-care bits) into an active-high state and then masking off the don't care bits. If
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// the shift occurs before the inversion, the upper 2 bits (which would then be don't
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// care) would contain erroneous data.
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let attenuation_code = (!channels[channel as usize]).wrapping_shr(2);
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// Convert the desired channel code into dB of attenuation.
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Ok(attenuation_code as f32 / 2.0)
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}
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@ -103,8 +103,9 @@ where
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// Configure power-on-default state for pounder. All LEDs are on, on-board oscillator
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// selected, attenuators out of reset.
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devices.mcp23017.write_gpioa(0xF).map_err(|_| Error::I2c)?;
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devices.mcp23017.write_gpiob(1_u8.wrapping_shl(5)).map_err(|_| Error::I2c)?;
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devices.mcp23017.write_gpio(mcp23017::Port::GPIOA, 0xF).map_err(|_| Error::I2c)?;
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devices.mcp23017.write_gpio(mcp23017::Port::GPIOB,
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1_u8.wrapping_shl(5)).map_err(|_| Error::I2c)?;
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devices.mcp23017.all_pin_mode(mcp23017::PinMode::OUTPUT).map_err(|_| Error::I2c)?;
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devices.select_onboard_clock()?;
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@ -113,14 +114,14 @@ where
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}
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pub fn select_external_clock(&mut self, frequency: u32) -> Result<(), Error>{
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self.mcp23017.digital_write(EXT_CLK_SEL_PIN, 1).map_err(|_| Error::I2c)?;
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self.mcp23017.digital_write(EXT_CLK_SEL_PIN, true).map_err(|_| Error::I2c)?;
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self.ad9959.set_clock_frequency(frequency).map_err(|_| Error::DDS)?;
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Ok(())
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}
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pub fn select_onboard_clock(&mut self) -> Result<(), Error> {
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self.mcp23017.digital_write(EXT_CLK_SEL_PIN, 0).map_err(|_| Error::I2c)?;
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self.mcp23017.digital_write(EXT_CLK_SEL_PIN, false).map_err(|_| Error::I2c)?;
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self.ad9959.set_clock_frequency(100_000_000).map_err(|_| Error::DDS)?;
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Ok(())
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@ -130,24 +131,26 @@ where
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impl<DELAY> AttenuatorInterface for PounderDevices<DELAY>
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{
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fn reset(&mut self) -> Result<(), Error> {
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self.mcp23017.digital_write(ATT_RST_N_PIN, 1).map_err(|_| Error::I2c)?;
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// TODO: Delay here.
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self.mcp23017.digital_write(ATT_RST_N_PIN, 0).map_err(|_| Error::I2c)?;
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self.mcp23017.digital_write(ATT_RST_N_PIN, true).map_err(|_| Error::I2c)?;
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// TODO: Measure the I2C transaction speed to the RST pin to ensure that the delay is
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// sufficient. Document the delay here.
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self.mcp23017.digital_write(ATT_RST_N_PIN, false).map_err(|_| Error::I2c)?;
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Ok(())
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}
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fn latch(&mut self, channel: DdsChannel) -> Result<(), Error> {
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let pin = match channel {
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DdsChannel::Zero => ATT_LE0_PIN,
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DdsChannel::One => ATT_LE1_PIN,
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DdsChannel::Two => ATT_LE2_PIN,
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DdsChannel::Three => ATT_LE3_PIN,
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DdsChannel::Zero => ATT_LE1_PIN,
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DdsChannel::One => ATT_LE0_PIN,
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DdsChannel::Two => ATT_LE3_PIN,
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DdsChannel::Three => ATT_LE2_PIN,
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};
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self.mcp23017.digital_write(pin, 1).map_err(|_| Error::I2c)?;
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// TODO: Delay here.
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self.mcp23017.digital_write(pin, 0).map_err(|_| Error::I2c)?;
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self.mcp23017.digital_write(pin, true).map_err(|_| Error::I2c)?;
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// TODO: Measure the I2C transaction speed to the RST pin to ensure that the delay is
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// sufficient. Document the delay here.
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self.mcp23017.digital_write(pin, false).map_err(|_| Error::I2c)?;
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Ok(())
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}
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@ -7,7 +7,8 @@ pub trait PowerMeasurementInterface {
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fn measure_power(&mut self, channel: InputChannel) -> Result<f32, Error> {
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let analog_measurement = self.sample_converter(channel)?;
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// The AD8363 with VSET connected to VOUT provides an output voltage of 52mV / dB.
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Ok(analog_measurement / 0.052)
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// The AD8363 with VSET connected to VOUT provides an output voltage of 51.7mV / dB at
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// 100MHz.
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Ok(analog_measurement / 0.0517)
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}
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}
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