Commit Graph

12 Commits (276320d4c8b247b2a7a0e97e415e449622adfc87)

Author SHA1 Message Date
Harry Ho 276320d4c8 plot_sayma_data: Normalize data for plotting 2021-04-12 16:15:04 +08:00
Harry Ho 64e85fc143 [WIP] Simplify ARTIQ scripts for DAC & TTL sync tests
* A single `SyncDDSTTL` experiment definition can be used to test DAC and TTL outputs.
* For ST1/ST3, simply run this on Sayma gateware that produces hardcoded waves at SAWGs.
* For ST2/ST4, either:
  * simply run this on Sayma gateware that produces hardcoded waves at both SAWGs and TTLs; or
  * set `gen_ttl_wave=true` and run this on Sayma gateware that produces hardcoded waves at SAWGs only, while both MCXs are used as TTLOuts.
2021-04-12 16:15:04 +08:00
Harry Ho db4ae51030 mch_start: Improve message 2021-04-12 15:03:01 +08:00
Harry Ho 33d81cdbdc Add gain control & options for data collection/plotting; fix doc 2021-04-12 15:03:01 +08:00
Harry Ho bd792739c3 Add auto script for getting data on remote and plotting data on local 2021-03-09 17:02:10 +08:00
Harry Ho 45367ac52f Update RP data collection/plotting scripts with argparse & asyncio 2021-03-09 17:02:10 +08:00
Harry Ho fa0b190234 [WIP] Add preliminary ARTIQ scripts for ST1, ST2
* For ST2, add the argument `ttl_use_fpga=true` to disable generating 111ns pulses on the TTLs.
2021-03-09 17:02:10 +08:00
Harry Ho a0d92497a9 Add ARTIQ device DB 2021-03-09 09:54:33 +08:00
Harry Ho 7909267b88 Add RP data collection/plotting scripts
* rp_get_sayma_data.py: to be installed on Creotech remote.
* plot_sayma_data.py: to be installed on local.
2021-02-22 17:43:48 +08:00
Harry Ho bf492e2f50 Add MCH control/logging scripts 2021-02-22 17:41:48 +08:00
Harry Ho 4655ffffb7 Add /etc/udev/rules.d rules 2021-02-22 17:41:40 +08:00
Harry Ho 914625d0ae Initial commit 2021-02-22 17:39:27 +08:00