fsagbuya/nix-servo
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nix-servo/fast-servo/linien-gateware
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linuswck 6cef418756 gateware: Add CSR Ctrl to PL's MMCM 
- Generate 45 Degree Phase Shifted DDR Clock
- PLLE2_Base -> MMCM_ADV for ddr clock dynamic phase shift
- Add mmcm_rst, ddr_clk_ps, mmcm_locked status to CSR
- Generate dco2d rst signal from mmcm and connect to the related logic
2024-11-08 16:33:17 +08:00
..
cores gateware: Add CSR Ctrl to PL's MMCM 2024-11-08 16:33:17 +08:00
verilog add fast-servo gateware support files 2024-03-01 16:39:56 +08:00
__init__.py add fast-servo gateware support files 2024-03-01 16:39:56 +08:00
fast_servo_platform.py add fast-servo gateware support files 2024-03-01 16:39:56 +08:00
fast_servo_soc.py add fast-servo gateware support files 2024-03-01 16:39:56 +08:00
README.md fix typo 2024-03-06 17:53:13 +08:00

README.md

Source Repository

Files in this directory were copied from elhep/Fast-Servo-Firmware.

Commit ID

The files were copied from commit ID 7fae40c.