• Joined on 2020-05-28
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-31 16:07:24 +08:00
ecba1dc3e7 Add JALR instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-31 14:26:36 +08:00
08150e1ecd Add I-type instruction class
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-31 14:07:03 +08:00
67cba5bf12 Add JAL instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-31 13:57:59 +08:00
b6a68b5b15 Add UJ-type instruction class
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-31 13:44:29 +08:00
7ddfa890dc Add AUIPC instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-31 13:41:01 +08:00
05266b8474 Add LUI instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-31 13:29:57 +08:00
9cbed8f147 Add U-type instruction class
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-31 13:06:11 +08:00
5274e5b1f1 Add generic instruction class
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-31 11:56:30 +08:00
29c5e52574 Categorize RV32IM instructions by type
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-31 11:18:09 +08:00
aa9967e83d Start over in insns/
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-30 17:37:20 +08:00
e3273c7e51 Fix BGEU instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-30 16:33:56 +08:00
83e7ab1f05 Fix BLTU instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-30 16:31:33 +08:00
b8e8d10648 Fix BGE instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-30 16:29:11 +08:00
d0de67d09c Fix BLT instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-30 16:26:39 +08:00
65e4b68517 Fix BNE instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-30 16:24:12 +08:00
4146a2ed20 Fix BEQ instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-30 16:19:08 +08:00
9ddc5563f7 Fix JALR instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-30 16:16:13 +08:00
b583ab728f Fix JAL instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-30 16:12:17 +08:00
6cff1038be Fix AUIPC instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-07-30 16:08:35 +08:00
4d62caadc7 Fix U-type instruction format