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734 Commits 5 Branches 0 Tags 1.7 MiB
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734 Commits

Author SHA1 Message Date
mwojcik 92a29051f7 drtio_aux_controller: support aux_buffer_count 2024-04-24 17:12:39 +08:00
morgan 14fa038118 Firmware: Runtime WRPLL 
runtime: drive CLK_SEL to true when si549 is used
runtime & libboard_artiq: allow standalone to use io_expander
si549: add bit bang mmcm dynamic configuration
si549: add frequency counter for refclk
rtio_clocking & si549: add 125Mhz wrpll refclk setup
 2024-04-12 16:38:46 +08:00
morgan b81323af30 Firmware: Satman skew calibration & tester 
cargo template: add calibrate_wrpll_skew feature
tag collector: add TAG_OFFSET for Satman WRPLL
tag collector: add TAG_OFFSET getter & setter for calibration
wrpll: add skew tester and calibration
wrpll: gate calibration behind calibrate_wrpll_skew feature
 2024-04-12 16:38:46 +08:00
morgan 291777f764 Firmware: Satman WRPLL 
satman: drive CLK_SEL to true when si549 is used
satman : add main & helper si549 setup
satman : add WRPLL select_recovered_clock
si549: add tag collector to process gtx & main tags
si549: add frequency counter to set BASE_ADPLL
si549: add set_adpll for main & helper PLL
si549: add main & helper PLL
FIQ & si549: replace dummy with a custom handler for gtx & main tags ISR
 2024-04-12 16:38:39 +08:00
morgan a1d80fb93b Firmware: Si549 and io_expander 
io_expander: set CLK_SEL pin to output when si549 is used
io_expander: gate virtual leds for standalone
si549: add bit bang i2c
si549: add si549 programming
si549: add main & helper setup
 2024-04-11 15:18:10 +08:00
morgan 7827c7b803 Gateware: kasli_soc WRPLL setup 
kasli_soc: use enable_wrpll from json to switch from si5324 to si549
kasli_soc: add wrpll for all variants
kasli_soc: add gtx & main tag nFIQ for all variants
kasli_soc: add clk_synth_se for master & satellite
kasli_soc: add wrpll_refclk for runtime
kasli_soc: add skewtester for satman
kasli_soc: add WRPLL_REF_CLK config for firmware
 2024-04-11 15:18:10 +08:00
morgan e4d8d44c7c Gateware: WRPLL 
ddmtd: add DDMTD and deglitcher
wrpll: add helper clockdomain
wrpll: add frequency counter
wrpll: add skewtester
wrpll: add gtx & main tag collection
wrpll: add gtx & main tag eventmanager for shared peripheral interrupt
wrpll: add SMA frequency multiplier to generate 125Mhz refclk
si549: add i2c and adpll programmer
 2024-04-11 15:18:04 +08:00
morgan 4f34a7c6d0 flake: update artiq 2024-03-15 12:11:32 +08:00
morgan 1f7c53b8d0 flake: update zynq-rs 2024-03-08 10:18:54 +08:00
morgan 4455f740d2 main: set exception vector table addr 
linker: add exceptions start & end symbol
 2024-03-07 15:37:42 +08:00
morgan 63bf1c81d4 fiq: use dummy handler to fix compilation error 2024-03-07 13:26:52 +08:00
Sebastien Bourdeauducq cf0b83c3f9 flake: update dependencies 2024-02-01 18:58:44 +08:00
mwojcik bfb582f99b cargo fmt 2024-02-01 14:43:41 +08:00
mwojcik 52e64fb2f9 subkernel: use negative ID for argument passing 2024-02-01 14:43:41 +08:00
mwojcik facc98058c subkernel: fix DMA return control to wrong master 2024-02-01 14:43:41 +08:00
mwojcik f0f81dbf8a subkernel: support no-timeout, message passing 2024-02-01 14:43:41 +08:00
mwojcik 30e6bf4a3a subkernel: add support for (d)dma 2024-01-11 12:33:02 +08:00
mwojcik 8f4e30dd9c satman: support sub-subkernels, routing 2024-01-11 12:33:02 +08:00
mwojcik e31a31c4ff master: drtioaux: 
- support async flag
- source in packets
- rerouting packets
 2024-01-11 12:33:02 +08:00
Sebastien Bourdeauducq d044bbd8bb flake: update dependencies 2024-01-11 12:32:42 +08:00
Sebastien Bourdeauducq 33cf924805 flake: update dependencies 2023-12-04 19:10:26 +08:00
Sebastien Bourdeauducq f7887b14f6 flake: update dependencies 2023-12-03 16:16:40 +08:00
Sebastien Bourdeauducq 3e3e23918e update dependencies 2023-12-03 11:51:12 +08:00
mwojcik 6ca1719033 comms: fix compilation on standalone 2023-11-14 14:08:31 +08:00
mwojcik aebc739c1e add support for tar flashable (sub)kernels 2023-11-13 11:24:23 +08:00
linuswck e1b2c45813 kasli_soc & zc706: Fix GTX Clock Path during INIT 2023-11-07 18:55:08 +08:00
linuswck e6372b9766 zynq_clocking: Allow ext signal to set cur_clk csr 
- for example, current_clock csr can be connected to tx_init.done
 2023-11-07 18:55:08 +08:00
linuswck 07044752b6 zynq_clocking: add ext_async_rst to AsyncRstSYNCR 2023-11-07 18:55:08 +08:00
linuswck 79fc5a7789 zynq_clocking: expose mmcm_locked for SYSCRG 
- mmcm_locked -> self.mmcm_locked
 2023-11-07 18:55:08 +08:00
Sebastien Bourdeauducq d3f4602361 flake: update dependencies 2023-11-07 18:54:31 +08:00
mwojcik 6c8346ca5f subkernel: improve stability, 
fix exception on awaiting message
 2023-11-02 16:58:34 +08:00
mwojcik b76f634686 drtio: increase robustness for longer payloads 2023-11-02 14:48:52 +08:00
morgan 4a34777b97 refactor i2c, io_expander, task under the same cfg 2023-10-25 11:52:04 +08:00
morgan 43e4527392 fix kasli-soc demo compilation warning 2023-10-25 11:45:13 +08:00
Sebastien Bourdeauducq a08a42c954 flake: update dependencies 2023-10-20 17:46:37 +08:00
mwojcik 0a3bfc9a61 subkernel: separate tags and data 2023-10-18 12:03:43 +08:00
Egor Savkin d3fbfd75b0 Fix grabber build and warning 
Signed-off-by: Egor Savkin <es@m-labs.hk>
 2023-10-18 11:24:43 +08:00
Egor Savkin b768d5648c Add grabber module 
Signed-off-by: Egor Savkin <es@m-labs.hk>
 2023-10-16 14:35:20 +08:00
Sebastien Bourdeauducq 812aea33b3 rustfmt 2023-10-11 17:56:30 +08:00
linuswck 136e24f597 kasli-soc: Add BUFG to the IBUFGDS for MMCM CLKIN1 
- Fix Vivado Compilation Error [DRC REQP-119]
- MMCME2_ADV CLKIN1 and CLKIN2 are now driven from the same source type (BUFG)
 2023-10-11 16:45:26 +08:00
Sebastien Bourdeauducq 0f050844cf flake: update dependencies 2023-10-11 16:41:54 +08:00
linuswck a4d1be00c0 Firmware: Add drtio_eem.rs support 
- Port from Artiq repo
- Initialize the drtio_eem on main, rtio_clocking
- Driver for eem_transceiver
 2023-10-10 11:22:05 +08:00
linuswck b15322b6ba kasli_soc: Add support for shuttler on gateware 
- Port from artiq repo
- Add EEM_DRTIO gateware
 2023-10-10 11:22:05 +08:00
linuswck 8fd1306145 zynq_clocking: Add sys5x, 208MHz CLK & IDELAYCTRL 
- Port from artiq repo
- Generate sys5x for for EEM Serdes, 208MHz REF Clock for IDELAYCTRL
- Add IDELAYCTRL for IDEALYE2 in EEM Serdes
 2023-10-10 11:21:34 +08:00
Sebastien Bourdeauducq a28a819b18 add manifests target to PHONY 2023-10-09 18:29:53 +08:00
Sebastien Bourdeauducq 3f414278e2 cleanup 2023-10-09 18:28:20 +08:00
Sebastien Bourdeauducq e5aafad60d force cargo to use our copy of zynq-rs 2023-10-09 18:27:58 +08:00
mwojcik b9a0bcabeb ksupport: fix build on acpki variants 2023-10-09 17:10:45 +08:00
mwojcik 8eb359ee42 cargo fmt 2023-10-09 11:50:47 +08:00
mwojcik 7263862fd8 satellite: support optional args 2023-10-09 11:42:51 +08:00