forked from M-Labs/zynq-rs
eth: wait for link
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c5a7f059c2
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@ -392,17 +392,20 @@ impl<'r, RX, TX> Eth<'r, RX, TX> {
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pub fn reset_phy(&mut self) -> bool {
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pub fn reset_phy(&mut self) -> bool {
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match phy::Phy::find(self) {
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match phy::Phy::find(self) {
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Some(phy) => {
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Some(phy) => {
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println!("eth: Found PHY at {}: {}", phy.addr, phy.name());
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phy.modify_control(self, |control|
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phy.modify_control(self, |control|
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control.set_reset(true)
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control.set_reset(true)
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);
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);
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while phy.get_control(self).reset() {
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while phy.get_control(self).reset() {
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println!("Wait for PHY reset");
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println!("eth: Wait for PHY reset");
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}
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}
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phy.modify_control(self, |control|
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phy.modify_control(self, |control|
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control.set_autoneg_enable(true)
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control.set_autoneg_enable(true)
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.set_restart_autoneg(true)
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.set_restart_autoneg(true)
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);
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);
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// 125 MHz for 1000base-TX
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println!("eth: Wait for link");
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while !phy.get_status(self).link_status() {}
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println!("eth: Got link, setting clock for gigabit");
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Self::setup_gem0_clock(TX_1000);
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Self::setup_gem0_clock(TX_1000);
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true
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true
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