forked from M-Labs/zynq-rs
zynq::eth: enable checksum offload
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3eb7fce572
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@ -337,8 +337,17 @@ impl<'r, 'rx, 'tx: 'a, 'a> smoltcp::phy::Device<'a> for &mut Eth<'r, rx::DescLis
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type TxToken = tx::Token<'a, 'tx>;
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type TxToken = tx::Token<'a, 'tx>;
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fn capabilities(&self) -> smoltcp::phy::DeviceCapabilities {
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fn capabilities(&self) -> smoltcp::phy::DeviceCapabilities {
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let mut caps = smoltcp::phy::DeviceCapabilities::default();
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use smoltcp::phy::{DeviceCapabilities, ChecksumCapabilities, Checksum};
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let mut checksum_caps = ChecksumCapabilities::default();
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checksum_caps.ipv4 = Checksum::Both;
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checksum_caps.tcp = Checksum::Both;
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checksum_caps.udp = Checksum::Both;
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let mut caps = DeviceCapabilities::default();
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caps.max_transmission_unit = MTU;
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caps.max_transmission_unit = MTU;
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caps.checksum = checksum_caps;
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caps
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caps
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}
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}
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@ -457,6 +466,8 @@ impl<'r> EthInner<'r> {
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.copy_all(true)
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.copy_all(true)
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// Remove 4-byte Frame CheckSum
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// Remove 4-byte Frame CheckSum
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.fcs_remove(true)
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.fcs_remove(true)
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// RX checksum offload
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.rx_chksum_offld_en(true)
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// One of the slower speeds
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// One of the slower speeds
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.mdc_clk_div((mdc_clk_div >> 4).min(0b111) as u8)
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.mdc_clk_div((mdc_clk_div >> 4).min(0b111) as u8)
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);
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);
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@ -487,6 +498,7 @@ impl<'r> EthInner<'r> {
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.rx_pktbuf_memsz_sel(0x3)
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.rx_pktbuf_memsz_sel(0x3)
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// 4 KB
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// 4 KB
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.tx_pktbuf_memsz_sel(true)
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.tx_pktbuf_memsz_sel(true)
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// TX checksum offload
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.csum_gen_offload_en(true)
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.csum_gen_offload_en(true)
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// Little-endian
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// Little-endian
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.ahb_endian_swp_mgmt_en(false)
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.ahb_endian_swp_mgmt_en(false)
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