forked from M-Labs/zynq-rs
zynq::mpcore: add register definitions
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@ -5,3 +5,4 @@ pub mod eth;
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pub mod axi_hp;
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pub mod axi_hp;
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pub mod axi_gp;
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pub mod axi_gp;
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pub mod ddr;
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pub mod ddr;
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pub mod mpcore;
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29
src/zynq/mpcore.rs
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29
src/zynq/mpcore.rs
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@ -0,0 +1,29 @@
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///! Register definitions for Application Processing Unit (mpcore)
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use volatile_register::{RO, RW, WO};
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use crate::{register, register_at, register_bit};
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#[repr(C)]
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pub struct RegisterBlock {
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pub scu_control: ScuControl,
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pub scu_config: RO<u32>,
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pub scu_cpu_power: RW<u32>,
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pub scu_invalidate: WO<u32>,
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reserved0: [u32; 12],
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pub filter_start: RW<u32>,
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pub filter_end: RW<u32>,
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reserved1: [u32; 2],
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pub scu_access_control: RW<u32>,
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pub scu_non_secure_access_control: RW<u32>,
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// there is plenty more (unimplemented)
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}
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register_at!(RegisterBlock, 0xF8F00000, new);
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register!(scu_control, ScuControl, RW, u32);
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register_bit!(scu_control, ic_standby_enable, 6);
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register_bit!(scu_control, scu_standby_enable, 5);
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register_bit!(scu_control, force_to_port0_enable, 4);
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register_bit!(scu_control, scu_speculative_linefill_enable, 3);
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register_bit!(scu_control, scu_rams_parity_enable, 2);
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register_bit!(scu_control, address_filtering_enable, 1);
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register_bit!(scu_control, enable, 0);
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