forked from M-Labs/zynq-rs
libboard_zynq: doc ddr size limitation, correct target_redpitaya to 512MB
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@ -392,12 +392,14 @@ impl DdrRam {
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/// actually there's 1 MB more but starting at 0x0000_0000
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/// actually there's 1 MB more but starting at 0x0000_0000
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/// overlaps with OCM.
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/// overlaps with OCM.
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pub fn size(&self) -> usize {
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pub fn size(&self) -> usize {
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// DDR range ends at 0x3FFF_FFFF in the default SCU address
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// filtering address map
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#[cfg(feature = "target_zc706")]
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#[cfg(feature = "target_zc706")]
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let megabytes = 1023;
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let megabytes = 1023;
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#[cfg(feature = "target_cora_z7_10")]
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#[cfg(feature = "target_cora_z7_10")]
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let megabytes = 512;
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let megabytes = 512;
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#[cfg(feature = "target_redpitaya")]
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#[cfg(feature = "target_redpitaya")]
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let megabytes = 511;
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let megabytes = 512;
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megabytes * 1024 * 1024
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megabytes * 1024 * 1024
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}
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}
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