M-Labs
/
zynq-rs
11
0
Fork 15
Code Issues 6 Pull Requests 1 Releases Wiki Activity
Bare-metal Rust on Zynq-7000
510 Commits 1 Branch 0 Tags 2 MiB
Rust 90.6%
Nix 6.8%
Assembly 2.5%
Go to file
Astro 9ee77d8f44 libboard_zynq: indent ps7_init/cora_z7_10 2020-11-08 19:32:31 +01:00
.cargo cargo: remove unmaintained runner 2020-09-09 15:01:39 +08:00
experiments libboard_zynq: add ps7_init for cora_z7_10 2020-11-08 19:28:59 +01:00
libasync update some dependencies 2020-10-13 18:28:42 +08:00
libboard_zynq libboard_zynq: indent ps7_init/cora_z7_10 2020-11-08 19:32:31 +01:00
libconfig libconfig: fixed szl build. 2020-11-04 20:47:40 +08:00
libcoreio add libconfig, libcoreio, szl from artiq-zynq a277e89b3ad; update dependencies 2020-09-09 17:56:50 +08:00
libcortex_a9 add Red Pitaya support (WIP) 2020-09-09 20:10:05 +08:00
libregister update authors in cargo.toml 2020-09-09 19:36:25 +08:00
libsupport_zynq add Red Pitaya support (WIP) 2020-09-09 20:10:05 +08:00
nix update Rust 2020-10-13 18:25:39 +08:00
openocd openocd: remove xilinx-tcl on Cora Z7 2020-11-08 18:44:41 +01:00
szl libconfig: make default IP/MAC depend on board 2020-10-14 12:53:32 +08:00
.gitignore remove zc706.elf from gitignore 2020-01-16 02:13:11 +08:00
Cargo.lock update some dependencies 2020-10-13 18:28:42 +08:00
Cargo.toml add libconfig, libcoreio, szl from artiq-zynq a277e89b3ad; update dependencies 2020-09-09 17:56:50 +08:00
README.md README: add introduction 2020-09-29 16:27:44 +08:00
armv7-none-eabihf.json define custom target, use with cargo-xbuild 2019-08-06 22:03:04 +02:00
default.nix add SZL for Red Pitaya 2020-10-14 12:35:23 +08:00
remote_run.sh add remote run script 2020-06-04 19:57:52 +08:00
shell.nix expose patched cargo-xbuild 2020-10-13 18:43:37 +08:00
xbuild_writable_lockfile.diff patch cargo-xbuild to ensure copied Cargo.lock is writable 2020-10-13 18:27:52 +08:00

README.md

Bare-metal Rust on Zynq-7000

Supported features:

  • Clocking setup
  • UART
  • SDRAM setup
  • Ethernet with smoltcp and async-await on TCP sockets
  • SD card
  • PL programming and startup
  • Pure Rust SZL first-stage bootloader, with SD boot and netboot
  • Control of second CPU core and message passing, with async-await support

Supported boards:

  • ZC706
  • Red Pitaya (note: SDRAM issues, worked around using ps7_init)
  • Cora Z7-10 (note: SDRAM issues)

Build

nix-shell --command "cargo xbuild --release -p experiments"

Currently the ELF output is placed at target/armv7-none-eabihf/release/experiments

Debug

Running on the ZC706

nix-shell --command "cargo xbuild --release -p experiments"
cd openocd
openocd -f zc706.cfg

Running on the Cora Z7-10

nix-shell --command "cd experiments && cargo xbuild --release --no-default-features --features=target_cora_z7_10"
cd openocd
openocd -f cora-z7-10.cfg

Loading a bitstream into volatile memory

openocd -f zc706.cfg -c "pld load 0 blinker_migen.bit; exit"