55 lines
1.5 KiB
Rust
55 lines
1.5 KiB
Rust
use libregister::{RegisterR, RegisterW};
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use libcortex_a9::{regs::{DFSR, MPIDR, VBAR}, interrupt_handler};
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use libboard_zynq::{println, stdio};
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pub fn set_vector_table(base_addr: u32){
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VBAR.write(base_addr);
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}
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interrupt_handler!(UndefinedInstruction, undefined_instruction, __irq_stack0_start, __irq_stack1_start, {
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stdio::drop_uart();
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println!("UndefinedInstruction");
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loop {}
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});
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interrupt_handler!(SoftwareInterrupt, software_interrupt, __irq_stack0_start, __irq_stack1_start, {
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stdio::drop_uart();
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println!("SoftwareInterrupt");
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loop {}
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});
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interrupt_handler!(PrefetchAbort, prefetch_abort, __irq_stack0_start, __irq_stack1_start, {
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stdio::drop_uart();
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println!("PrefetchAbort");
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loop {}
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});
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interrupt_handler!(DataAbort, data_abort, __irq_stack0_start, __irq_stack1_start, {
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stdio::drop_uart();
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println!("DataAbort on core {}", MPIDR.read().cpu_id());
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println!("DFSR: {:03X}", DFSR.read());
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loop {}
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});
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interrupt_handler!(ReservedException, reserved_exception, __irq_stack0_start, __irq_stack1_start, {
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stdio::drop_uart();
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println!("ReservedException");
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loop {}
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});
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#[cfg(feature = "dummy_irq_handler")]
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interrupt_handler!(IRQ, irq, __irq_stack0_start, __irq_stack1_start, {
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stdio::drop_uart();
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println!("IRQ");
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loop {}
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});
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#[cfg(feature = "dummy_fiq_handler")]
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interrupt_handler!(FIQ, fiq, __irq_stack0_start, __irq_stack1_start, {
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stdio::drop_uart();
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println!("FIQ");
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loop {}
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});
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