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Author | SHA1 | Date | |
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bae8081935 | |||
281ba1370d | |||
710984bdaf | |||
12cb5c0651 | |||
f6edec89ba | |||
c48ec58b9e | |||
b2f8c83a3c | |||
3a052b8e4f | |||
ae61abbf06 | |||
82d8079eca | |||
a313898794 | |||
2f7e16c670 |
@ -1,7 +1,7 @@
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[target.armv7-none-eabihf]
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[target.armv7-none-eabihf]
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rustflags = [
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rustflags = [
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"-C", "link-arg=-Tlink.x",
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"-C", "link-arg=-Tlink.x",
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"-C", "target-feature=a9,armv7-a,neon",
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"-C", "target-feature=+a9,+armv7-a,+neon",
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"-C", "target-cpu=cortex-a9",
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"-C", "target-cpu=cortex-a9",
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]
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]
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4
Cargo.lock
generated
4
Cargo.lock
generated
@ -34,9 +34,9 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd"
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[[package]]
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[[package]]
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name = "compiler_builtins"
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name = "compiler_builtins"
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version = "0.1.49"
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version = "0.1.70"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "20b1438ef42c655665a8ab2c1c6d605a305f031d38d9be689ddfef41a20f3aa2"
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checksum = "80873f979f0a344a4ade87c2f70d9ccf5720b83b10c97ec7cd745895d021e85a"
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[[package]]
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[[package]]
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name = "core_io"
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name = "core_io"
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@ -1,8 +1,6 @@
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#![no_std]
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#![no_std]
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#![no_main]
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#![no_main]
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#![allow(incomplete_features)]
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#![feature(naked_functions)]
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#![feature(naked_functions)]
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#![feature(asm)]
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#![feature(inline_const)]
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#![feature(inline_const)]
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extern crate alloc;
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extern crate alloc;
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@ -11,7 +11,7 @@
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let
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let
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pkgs = import nixpkgs { system = "x86_64-linux"; overlays = [ (import rust-overlay) crosspkgs-overlay ]; };
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pkgs = import nixpkgs { system = "x86_64-linux"; overlays = [ (import rust-overlay) crosspkgs-overlay ]; };
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rust = pkgs.rust-bin.nightly."2021-09-01".default.override {
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rust = pkgs.rust-bin.nightly."2022-04-01".default.override {
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extensions = [ "rust-src" ];
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extensions = [ "rust-src" ];
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targets = [ ];
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targets = [ ];
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};
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};
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@ -113,7 +113,7 @@
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};
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};
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};
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};
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nativeBuildInputs = [ cargo-xbuild pkgs.llvmPackages_13.clang-unwrapped ];
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nativeBuildInputs = [ cargo-xbuild pkgs.llvmPackages_14.clang-unwrapped ];
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buildPhase = ''
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buildPhase = ''
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export XARGO_RUST_SRC="${rust}/lib/rustlib/src/rust/library"
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export XARGO_RUST_SRC="${rust}/lib/rustlib/src/rust/library"
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export CARGO_HOME=$(mktemp -d cargo-home.XXX)
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export CARGO_HOME=$(mktemp -d cargo-home.XXX)
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@ -169,7 +169,7 @@
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pkgs.openocd pkgs.gdb
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pkgs.openocd pkgs.gdb
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pkgs.openssh pkgs.rsync
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pkgs.openssh pkgs.rsync
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pkgs.llvmPackages_13.clang-unwrapped
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pkgs.llvmPackages_14.clang-unwrapped
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(pkgs.python3.withPackages(ps: [ ps.pyftdi ]))
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(pkgs.python3.withPackages(ps: [ ps.pyftdi ]))
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];
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];
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};
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};
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@ -54,7 +54,7 @@ pub unsafe fn enter_critical() -> bool {
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let mut cpsr: u32;
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let mut cpsr: u32;
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asm!(
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asm!(
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"mrs {}, cpsr
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"mrs {}, cpsr
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cpsid i", lateout(reg) cpsr);
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cpsid i", out(reg) cpsr);
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(cpsr & (1 << 7)) == 0
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(cpsr & (1 << 7)) == 0
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}
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}
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@ -6,6 +6,7 @@ pub fn enable_fpu() {
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mrc p15, 0, r1, c1, c0, 2
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mrc p15, 0, r1, c1, c0, 2
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orr r1, r1, (0b1111<<20)
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orr r1, r1, (0b1111<<20)
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mcr p15, 0, r1, c1, c0, 2
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mcr p15, 0, r1, c1, c0, 2
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isb
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vmrs r1, fpexc
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vmrs r1, fpexc
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orr r1, r1, (1<<30)
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orr r1, r1, (1<<30)
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@ -1,10 +1,6 @@
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#![no_std]
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#![no_std]
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#![feature(never_type)]
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#![feature(never_type)]
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#![feature(global_asm)]
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#![feature(asm)]
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#![allow(incomplete_features)]
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#![feature(inline_const)]
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#![feature(inline_const)]
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#![feature(const_fn_trait_bound)]
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extern crate alloc;
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extern crate alloc;
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@ -177,10 +177,7 @@ macro_rules! sync_channel {
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{
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{
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use core::sync::atomic::{AtomicUsize, AtomicPtr};
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use core::sync::atomic::{AtomicUsize, AtomicPtr};
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use $crate::sync_channel::{Sender, Receiver};
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use $crate::sync_channel::{Sender, Receiver};
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const fn new_atomic() -> AtomicPtr<$t> {
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static LIST: [AtomicPtr<$t>; $cap + 1] = [const { AtomicPtr::new(core::ptr::null_mut()) }; $cap + 1];
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AtomicPtr::new(core::ptr::null_mut())
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}
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static LIST: [AtomicPtr<$t>; $cap + 1] = [const { new_atomic() }; $cap + 1];
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static WRITE: AtomicUsize = AtomicUsize::new(0);
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static WRITE: AtomicUsize = AtomicUsize::new(0);
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static READ: AtomicUsize = AtomicUsize::new(0);
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static READ: AtomicUsize = AtomicUsize::new(0);
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(Sender::new(&LIST, &WRITE, &READ), Receiver::new(&LIST, &WRITE, &READ))
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(Sender::new(&LIST, &WRITE, &READ), Receiver::new(&LIST, &WRITE, &READ))
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@ -20,7 +20,7 @@ default = ["panic_handler", "dummy_irq_handler", "dummy_fiq_handler"]
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[dependencies]
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[dependencies]
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r0 = "1"
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r0 = "1"
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compiler_builtins = "=0.1.49"
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compiler_builtins = "=0.1.70"
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linked_list_allocator = { version = "0.8", default-features = false, features = ["const_mut_refs"] }
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linked_list_allocator = { version = "0.8", default-features = false, features = ["const_mut_refs"] }
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libregister = { path = "../libregister" }
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libregister = { path = "../libregister" }
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libcortex_a9 = { path = "../libcortex_a9" }
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libcortex_a9 = { path = "../libcortex_a9" }
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@ -66,10 +66,12 @@ unsafe extern "C" fn boot_core0() -> ! {
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unsafe extern "C" fn boot_core1() -> ! {
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unsafe extern "C" fn boot_core1() -> ! {
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l1_cache_init();
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l1_cache_init();
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enable_fpu();
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let mpcore = mpcore::RegisterBlock::mpcore();
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let mpcore = mpcore::RegisterBlock::mpcore();
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mpcore.scu_invalidate.invalidate_core1();
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mpcore.scu_invalidate.invalidate_core1();
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let mmu_table = mmu::L1Table::get();
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let mmu_table = mmu::L1Table::get()
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.setup_flat_layout();
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mmu::with_mmu(mmu_table, || {
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mmu::with_mmu(mmu_table, || {
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ACTLR.enable_smp();
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ACTLR.enable_smp();
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ACTLR.enable_prefetch();
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ACTLR.enable_prefetch();
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@ -3,8 +3,6 @@
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#![feature(alloc_error_handler)]
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#![feature(alloc_error_handler)]
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#![feature(panic_info_message)]
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#![feature(panic_info_message)]
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#![feature(naked_functions)]
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#![feature(naked_functions)]
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#![feature(global_asm)]
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#![feature(asm)]
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pub extern crate alloc;
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pub extern crate alloc;
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pub extern crate compiler_builtins;
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pub extern crate compiler_builtins;
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