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2 Commits

Author SHA1 Message Date
Astro c955eaae7f libboard_zynq: flush Uart by waiting for tx idle 2020-05-02 23:32:01 +02:00
Astro 0f666c570c libboard_zynq: remove unneeded Uart flush 2020-05-02 23:30:45 +02:00
3 changed files with 7 additions and 7 deletions

View File

@ -29,6 +29,6 @@ impl log::Log for Logger {
} }
fn flush(&self) { fn flush(&self) {
let uart = stdio::get_uart(); let uart = stdio::get_uart();
while !uart.tx_fifo_empty() {} while !uart.tx_idle() {}
} }
} }

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@ -63,6 +63,7 @@ macro_rules! println {
let mut uart = $crate::stdio::get_uart(); let mut uart = $crate::stdio::get_uart();
let _ = write!(uart, $($arg)*); let _ = write!(uart, $($arg)*);
let _ = write!(uart, "\n"); let _ = write!(uart, "\n");
while !uart.tx_fifo_empty() {} // flush after the newline
while !uart.tx_idle() {}
}) })
} }

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@ -192,15 +192,14 @@ impl Uart {
self.regs.channel_sts.read().txfull() self.regs.channel_sts.read().txfull()
} }
pub fn tx_fifo_empty(&self) -> bool { pub fn tx_idle(&self) -> bool {
self.regs.channel_sts.read().txempty() let status = self.regs.channel_sts.read();
status.txempty() && !status.tactive()
} }
} }
impl fmt::Write for Uart { impl fmt::Write for Uart {
fn write_str(&mut self, s: &str) -> Result<(), fmt::Error> { fn write_str(&mut self, s: &str) -> Result<(), fmt::Error> {
while !self.tx_fifo_empty() {}
for b in s.bytes() { for b in s.bytes() {
self.write_byte(b); self.write_byte(b);
} }
@ -222,7 +221,7 @@ impl embedded_hal::serial::Write<u8> for Uart {
} }
fn flush(&mut self) -> nb::Result<(), Void> { fn flush(&mut self) -> nb::Result<(), Void> {
if self.tx_fifo_empty() { if self.tx_idle() {
Ok(()) Ok(())
} else { } else {
Err(nb::Error::WouldBlock) Err(nb::Error::WouldBlock)