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7 changed files with 274 additions and 4230 deletions
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5
experiments/src/main.rs
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@ -15,7 +15,6 @@ use libboard_zynq::{
clocks::source::{ArmPll, ClockSource, IoPll},
clocks::Clocks,
print, println,
ps7_init,
sdio::sd_card::SdCard,
smoltcp::{
self,
@ -35,14 +34,14 @@ use libsupport_zynq::{
};
use log::info;
mod ps7_init;
const HWADDR: [u8; 6] = [0, 0x23, 0xde, 0xea, 0xbe, 0xef];
#[no_mangle]
pub fn main_core0() {
// zynq::clocks::CpuClocks::enable_io(1_250_000_000);
println!("\nzc706 main");
ps7_init::apply();
libboard_zynq::stdio::drop_uart();
libboard_zynq::logger::init().unwrap();
log::set_max_level(log::LevelFilter::Trace);

68
experiments/src/ps7_init/mod.rs Normal file
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@ -0,0 +1,68 @@
#![cfg(feature = "target_zc706")]
use libboard_zynq::println;
mod zc706;
// mod cora_z7_10;
#[cfg(feature = "target_zc706")]
use zc706 as target;
// #[cfg(feature = "target_cora_z7_10")]
// use cora_z7_10 as target;
pub fn report_differences() {
for (i, op) in target::INIT_DATA.iter().enumerate() {
let address = op.address();
let overwritten_later = target::INIT_DATA[(i + 1)..].iter()
.any(|later_op| later_op.address() == address);
if !overwritten_later {
op.report_difference();
}
}
}
pub enum InitOp {
MaskWrite(usize, usize, usize),
MaskPoll(usize, usize),
}
impl InitOp {
fn address(&self) -> usize {
match self {
InitOp::MaskWrite(address, _, _) => *address,
InitOp::MaskPoll(address, _) => *address,
}
}
fn read(&self) -> usize {
unsafe { *(self.address() as *const usize) }
}
fn difference(&self) -> Option<(usize, usize)> {
let (mask, expected) = match self {
InitOp::MaskWrite(_, mask, expected) =>
(*mask, *expected),
InitOp::MaskPoll(_, mask) =>
(*mask, *mask),
};
let actual = self.read();
if actual & mask == expected {
None
} else {
Some((actual & mask, expected))
}
}
pub fn report_difference(&self) {
if let Some((actual, expected)) = self.difference() {
println!(
"Register {:08X} is {:08X}&={:08X} != {:08X} expected",
self.address(),
self.read(),
actual,
expected
);
}
}
}

203
experiments/src/ps7_init/zc706.rs Normal file
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@ -0,0 +1,203 @@
use super::InitOp::{self, *};
pub const INIT_DATA: &'static [InitOp] = &[
// ps7_mio_init_data_1_0
MaskWrite(0xF8000B40, 0x00000FFF, 0x00000600),
MaskWrite(0xF8000B44, 0x00000FFF, 0x00000600),
MaskWrite(0xF8000B48, 0x00000FFF, 0x00000672),
MaskWrite(0xF8000B4C, 0x00000FFF, 0x00000672),
MaskWrite(0xF8000B50, 0x00000FFF, 0x00000674),
MaskWrite(0xF8000B54, 0x00000FFF, 0x00000674),
MaskWrite(0xF8000B58, 0x00000FFF, 0x00000600),
MaskWrite(0xF8000B5C, 0xFFFFFFFF, 0x0018C61C),
MaskWrite(0xF8000B60, 0xFFFFFFFF, 0x00F9861C),
MaskWrite(0xF8000B64, 0xFFFFFFFF, 0x00F9861C),
MaskWrite(0xF8000B68, 0xFFFFFFFF, 0x00F9861C),
MaskWrite(0xF8000B6C, 0x000073FF, 0x00000209),
MaskWrite(0xF8000B70, 0x00000021, 0x00000021),
MaskWrite(0xF8000B70, 0x00000021, 0x00000020),
MaskWrite(0xF8000B70, 0x07FFFFFF, 0x00000823),
MaskWrite(0xF8000700, 0x00003FFF, 0x00000600),
MaskWrite(0xF8000704, 0x00003FFF, 0x00000702),
MaskWrite(0xF8000708, 0x00003FFF, 0x00000702),
MaskWrite(0xF800070C, 0x00003FFF, 0x00000702),
MaskWrite(0xF8000710, 0x00003FFF, 0x00000702),
MaskWrite(0xF8000714, 0x00003FFF, 0x00000702),
MaskWrite(0xF8000718, 0x00003FFF, 0x00000702),
MaskWrite(0xF800071C, 0x00003FFF, 0x00000600),
MaskWrite(0xF8000720, 0x00003FFF, 0x00000700),
MaskWrite(0xF8000724, 0x00003FFF, 0x00000600),
MaskWrite(0xF8000728, 0x00003FFF, 0x00000600),
MaskWrite(0xF800072C, 0x00003FFF, 0x00000600),
MaskWrite(0xF8000730, 0x00003FFF, 0x00000600),
MaskWrite(0xF8000734, 0x00003FFF, 0x00000600),
MaskWrite(0xF8000738, 0x00003FFF, 0x00000600),
MaskWrite(0xF800073C, 0x00003FFF, 0x00000600),
MaskWrite(0xF8000740, 0x00003FFF, 0x00000302),
MaskWrite(0xF8000744, 0x00003FFF, 0x00000302),
MaskWrite(0xF8000748, 0x00003FFF, 0x00000302),
MaskWrite(0xF800074C, 0x00003FFF, 0x00000302),
MaskWrite(0xF8000750, 0x00003FFF, 0x00000302),
MaskWrite(0xF8000754, 0x00003FFF, 0x00000302),
MaskWrite(0xF8000758, 0x00003FFF, 0x00000303),
MaskWrite(0xF800075C, 0x00003FFF, 0x00000303),
MaskWrite(0xF8000760, 0x00003FFF, 0x00000303),
MaskWrite(0xF8000764, 0x00003FFF, 0x00000303),
MaskWrite(0xF8000768, 0x00003FFF, 0x00000303),
MaskWrite(0xF800076C, 0x00003FFF, 0x00000303),
MaskWrite(0xF8000770, 0x00003FFF, 0x00000304),
MaskWrite(0xF8000774, 0x00003FFF, 0x00000305),
MaskWrite(0xF8000778, 0x00003FFF, 0x00000304),
MaskWrite(0xF800077C, 0x00003FFF, 0x00000305),
MaskWrite(0xF8000780, 0x00003FFF, 0x00000304),
MaskWrite(0xF8000784, 0x00003FFF, 0x00000304),
MaskWrite(0xF8000788, 0x00003FFF, 0x00000304),
MaskWrite(0xF800078C, 0x00003FFF, 0x00000304),
MaskWrite(0xF8000790, 0x00003FFF, 0x00000305),
MaskWrite(0xF8000794, 0x00003FFF, 0x00000304),
MaskWrite(0xF8000798, 0x00003FFF, 0x00000304),
MaskWrite(0xF800079C, 0x00003FFF, 0x00000304),
MaskWrite(0xF80007A0, 0x00003FFF, 0x00000380),
MaskWrite(0xF80007A4, 0x00003FFF, 0x00000380),
MaskWrite(0xF80007A8, 0x00003FFF, 0x00000380),
MaskWrite(0xF80007AC, 0x00003FFF, 0x00000380),
MaskWrite(0xF80007B0, 0x00003FFF, 0x00000380),
MaskWrite(0xF80007B4, 0x00003FFF, 0x00000380),
MaskWrite(0xF80007B8, 0x00003F01, 0x00000201),
MaskWrite(0xF80007BC, 0x00003F01, 0x00000201),
MaskWrite(0xF80007C0, 0x00003FFF, 0x000002E0),
MaskWrite(0xF80007C4, 0x00003FFF, 0x000002E1),
MaskWrite(0xF80007C8, 0x00003FFF, 0x00000200),
MaskWrite(0xF80007CC, 0x00003FFF, 0x00000200),
MaskWrite(0xF80007D0, 0x00003FFF, 0x00000280),
MaskWrite(0xF80007D4, 0x00003FFF, 0x00000280),
MaskWrite(0xF8000830, 0x003F003F, 0x002F002E),
// ps7_pll_init_data_1_0
MaskWrite(0xF8000110, 0x003FFFF0, 0x000FA220),
MaskWrite(0xF8000100, 0x0007F000, 0x00028000),
MaskWrite(0xF8000100, 0x00000010, 0x00000010),
MaskWrite(0xF8000100, 0x00000001, 0x00000001),
MaskWrite(0xF8000100, 0x00000001, 0x00000000),
MaskPoll(0xF800010C, 0x00000001),
MaskWrite(0xF8000100, 0x00000010, 0x00000000),
MaskWrite(0xF8000120, 0x1F003F30, 0x1F000200),
MaskWrite(0xF8000114, 0x003FFFF0, 0x0012C220),
MaskWrite(0xF8000104, 0x0007F000, 0x00020000),
MaskWrite(0xF8000104, 0x00000010, 0x00000010),
MaskWrite(0xF8000104, 0x00000001, 0x00000001),
MaskWrite(0xF8000104, 0x00000001, 0x00000000),
MaskPoll(0xF800010C, 0x00000002),
MaskWrite(0xF8000104, 0x00000010, 0x00000000),
MaskWrite(0xF8000124, 0xFFF00003, 0x0C200003),
MaskWrite(0xF8000118, 0x003FFFF0, 0x001452C0),
MaskWrite(0xF8000108, 0x0007F000, 0x0001E000),
MaskWrite(0xF8000108, 0x00000010, 0x00000010),
MaskWrite(0xF8000108, 0x00000001, 0x00000001),
MaskWrite(0xF8000108, 0x00000001, 0x00000000),
MaskPoll(0xF800010C, 0x00000004),
MaskWrite(0xF8000108, 0x00000010, 0x00000000),
// ps7_clock_init_data_1_0
MaskWrite(0xF8000128, 0x03F03F01, 0x00700F01),
MaskWrite(0xF8000138, 0x00000011, 0x00000001),
MaskWrite(0xF8000140, 0x03F03F71, 0x00100801),
MaskWrite(0xF800014C, 0x00003F31, 0x00000501),
MaskWrite(0xF8000150, 0x00003F33, 0x00001401),
MaskWrite(0xF8000154, 0x00003F33, 0x00001402),
MaskWrite(0xF8000168, 0x00003F31, 0x00000501),
MaskWrite(0xF8000170, 0x03F03F30, 0x00200400),
MaskWrite(0xF80001C4, 0x00000001, 0x00000001),
MaskWrite(0xF800012C, 0x01FFCCCD, 0x01EC044D),
// ps7_ddr_init_data_1_0
MaskWrite(0xF8006000, 0x0001FFFF, 0x00000080),
MaskWrite(0xF8006004, 0x1FFFFFFF, 0x00081081),
MaskWrite(0xF8006008, 0x03FFFFFF, 0x03C0780F),
MaskWrite(0xF800600C, 0x03FFFFFF, 0x02001001),
MaskWrite(0xF8006010, 0x03FFFFFF, 0x00014001),
MaskWrite(0xF8006014, 0x001FFFFF, 0x0004159B),
MaskWrite(0xF8006018, 0xF7FFFFFF, 0x452460D2),
MaskWrite(0xF800601C, 0xFFFFFFFF, 0x720238E5),
MaskWrite(0xF8006020, 0xFFFFFFFC, 0x272872D0),
MaskWrite(0xF8006024, 0x0FFFFFFF, 0x0000003C),
MaskWrite(0xF8006028, 0x00003FFF, 0x00002007),
MaskWrite(0xF800602C, 0xFFFFFFFF, 0x00000008),
MaskWrite(0xF8006030, 0xFFFFFFFF, 0x00040930),
MaskWrite(0xF8006034, 0x13FF3FFF, 0x000116D4),
MaskWrite(0xF8006038, 0x00001FC3, 0x00000000),
MaskWrite(0xF800603C, 0x000FFFFF, 0x00000777),
MaskWrite(0xF8006040, 0xFFFFFFFF, 0xFFF00000),
MaskWrite(0xF8006044, 0x0FFFFFFF, 0x0FF66666),
MaskWrite(0xF8006048, 0x3FFFFFFF, 0x0003C248),
MaskWrite(0xF8006050, 0xFF0F8FFF, 0x77010800),
MaskWrite(0xF8006058, 0x0001FFFF, 0x00000101),
MaskWrite(0xF800605C, 0x0000FFFF, 0x00005003),
MaskWrite(0xF8006060, 0x000017FF, 0x0000003E),
MaskWrite(0xF8006064, 0x00021FE0, 0x00020000),
MaskWrite(0xF8006068, 0x03FFFFFF, 0x00284141),
MaskWrite(0xF800606C, 0x0000FFFF, 0x00001610),
MaskWrite(0xF80060A0, 0x00FFFFFF, 0x00008000),
MaskWrite(0xF80060A4, 0xFFFFFFFF, 0x10200802),
MaskWrite(0xF80060A8, 0x0FFFFFFF, 0x0690CB73),
MaskWrite(0xF80060AC, 0x000001FF, 0x000001FE),
MaskWrite(0xF80060B0, 0x1FFFFFFF, 0x1CFFFFFF),
MaskWrite(0xF80060B4, 0x000007FF, 0x00000200),
MaskWrite(0xF80060B8, 0x01FFFFFF, 0x00200066),
MaskWrite(0xF80060C4, 0x00000003, 0x00000000),
MaskWrite(0xF80060C8, 0x000000FF, 0x00000000),
MaskWrite(0xF80060DC, 0x00000001, 0x00000000),
MaskWrite(0xF80060F0, 0x0000FFFF, 0x00000000),
MaskWrite(0xF80060F4, 0x0000000F, 0x00000008),
MaskWrite(0xF8006114, 0x000000FF, 0x00000000),
MaskWrite(0xF8006118, 0x7FFFFFFF, 0x40000001),
MaskWrite(0xF800611C, 0x7FFFFFFF, 0x40000001),
MaskWrite(0xF8006120, 0x7FFFFFFF, 0x40000001),
MaskWrite(0xF8006124, 0x7FFFFFFF, 0x40000001),
MaskWrite(0xF800612C, 0x000FFFFF, 0x00033C03),
MaskWrite(0xF8006130, 0x000FFFFF, 0x00034003),
MaskWrite(0xF8006134, 0x000FFFFF, 0x0002F400),
MaskWrite(0xF8006138, 0x000FFFFF, 0x00030400),
MaskWrite(0xF8006140, 0x000FFFFF, 0x00000035),
MaskWrite(0xF8006144, 0x000FFFFF, 0x00000035),
MaskWrite(0xF8006148, 0x000FFFFF, 0x00000035),
MaskWrite(0xF800614C, 0x000FFFFF, 0x00000035),
MaskWrite(0xF8006154, 0x000FFFFF, 0x00000083),
MaskWrite(0xF8006158, 0x000FFFFF, 0x00000083),
MaskWrite(0xF800615C, 0x000FFFFF, 0x00000080),
MaskWrite(0xF8006160, 0x000FFFFF, 0x00000080),
MaskWrite(0xF8006168, 0x001FFFFF, 0x00000124),
MaskWrite(0xF800616C, 0x001FFFFF, 0x00000125),
MaskWrite(0xF8006170, 0x001FFFFF, 0x00000112),
MaskWrite(0xF8006174, 0x001FFFFF, 0x00000116),
MaskWrite(0xF800617C, 0x000FFFFF, 0x000000C3),
MaskWrite(0xF8006180, 0x000FFFFF, 0x000000C3),
MaskWrite(0xF8006184, 0x000FFFFF, 0x000000C0),
MaskWrite(0xF8006188, 0x000FFFFF, 0x000000C0),
MaskWrite(0xF8006190, 0xFFFFFFFF, 0x10040080),
MaskWrite(0xF8006194, 0x000FFFFF, 0x0001FC82),
MaskWrite(0xF8006204, 0xFFFFFFFF, 0x00000000),
MaskWrite(0xF8006208, 0x000F03FF, 0x000803FF),
MaskWrite(0xF800620C, 0x000F03FF, 0x000803FF),
MaskWrite(0xF8006210, 0x000F03FF, 0x000803FF),
MaskWrite(0xF8006214, 0x000F03FF, 0x000803FF),
MaskWrite(0xF8006218, 0x000F03FF, 0x000003FF),
MaskWrite(0xF800621C, 0x000F03FF, 0x000003FF),
MaskWrite(0xF8006220, 0x000F03FF, 0x000003FF),
MaskWrite(0xF8006224, 0x000F03FF, 0x000003FF),
MaskWrite(0xF80062A8, 0x00000FF7, 0x00000000),
MaskWrite(0xF80062AC, 0xFFFFFFFF, 0x00000000),
MaskWrite(0xF80062B0, 0x003FFFFF, 0x00005125),
MaskWrite(0xF80062B4, 0x0003FFFF, 0x000012A8),
MaskPoll(0xF8000B74, 0x00002000),
MaskWrite(0xF8006000, 0x0001FFFF, 0x00000081),
MaskPoll(0xF8006054, 0x00000007),
// ps7_peripherals_init_data_1_0
MaskWrite(0xF8000B48, 0x00000180, 0x00000180),
MaskWrite(0xF8000B4C, 0x00000180, 0x00000180),
MaskWrite(0xF8000B50, 0x00000180, 0x00000180),
MaskWrite(0xF8000B54, 0x00000180, 0x00000180),
MaskWrite(0xE0001034, 0x000000FF, 0x00000006),
MaskWrite(0xE0001018, 0x0000FFFF, 0x0000003E),
MaskWrite(0xE0001000, 0x000001FF, 0x00000017),
MaskWrite(0xE0001004, 0x00000FFF, 0x00000020),
MaskWrite(0xE000D000, 0x00080000, 0x00080000),
MaskWrite(0xF8007000, 0x20000000, 0x00000000),
];

1
libboard_zynq/src/lib.rs
View File

@ -21,4 +21,3 @@ pub mod time;
pub mod timer;
pub mod sdio;
pub mod logger;
pub mod ps7_init;

108
libboard_zynq/src/ps7_init/mod.rs
View File

@ -1,108 +0,0 @@
#![cfg(feature = "target_zc706")]
use crate::println;
mod zc706;
// mod cora_z7_10;
#[cfg(feature = "target_zc706")]
use zc706 as target;
// #[cfg(feature = "target_cora_z7_10")]
// use cora_z7_10 as target;
pub fn report_differences() {
for (i, op) in target::INIT_DATA.iter().enumerate() {
let address = op.address();
let overwritten_later = target::INIT_DATA[(i + 1)..].iter()
.any(|later_op| later_op.address() == address);
if !overwritten_later {
op.report_difference();
}
}
}
pub fn apply() {
for op in target::INIT_DATA {
op.apply();
}
}
#[derive(Clone, Debug)]
pub enum InitOp {
MaskWrite(usize, usize, usize),
MaskPoll(usize, usize),
MaskDelay(usize, usize),
}
impl InitOp {
fn address(&self) -> usize {
match self {
InitOp::MaskWrite(address, _, _) => *address,
InitOp::MaskPoll(address, _) => *address,
InitOp::MaskDelay(address, _) => *address,
}
}
fn read(&self) -> usize {
unsafe { *(self.address() as *const usize) }
}
fn difference(&self) -> Option<(usize, usize)> {
let expected = match self {
InitOp::MaskWrite(_, mask, expected) =>
Some((*mask, *expected)),
InitOp::MaskPoll(_, mask) =>
Some((*mask, *mask)),
_ => None,
};
match expected {
Some((mask, expected)) => {
let actual = self.read();
if actual & mask == expected {
None
} else {
Some((actual & mask, expected))
}
}
None =>
None
}
}
pub fn report_difference(&self) {
if let Some((actual, expected)) = self.difference() {
println!(
"Register {:08X} is {:08X}&={:08X} != {:08X} expected",
self.address(),
self.read(),
actual,
expected
);
}
}
pub fn apply(&self) {
let reg = self.address() as *mut usize;
println!("apply {:?}", self);
match self {
InitOp::MaskWrite(_, mask, val) =>
unsafe {
*reg = (val & mask) | (*reg & !mask);
},
InitOp::MaskPoll(_, mask) =>
while unsafe { *reg } & mask == 0 {},
InitOp::MaskDelay(_, mask) => {
let delay = get_number_of_cycles_for_delay(*mask);
while unsafe { *reg } < delay {
println!("W");
}
}
}
}
}
fn get_number_of_cycles_for_delay(delay: usize) -> usize {
const APU_FREQ: usize = 666666687;
APU_FREQ * delay/ (2 * 1000)
}

4113
libboard_zynq/src/ps7_init/zc706.rs
View File

File diff suppressed because it is too large Load Diff

6
libsupport_zynq/src/abort.rs
View File

@ -1,5 +1,3 @@
use libregister::RegisterR;
use libcortex_a9::regs::{DFSR, MPIDR};
use libboard_zynq::{println, slcr, stdio};
#[no_mangle]
@ -16,9 +14,7 @@ pub unsafe extern "C" fn PrefetchAbort() {
pub unsafe extern "C" fn DataAbort() {
stdio::drop_uart();
const CORE_MASK: u32 = 0x3;
println!("DataAbort on core {}", MPIDR.read() & CORE_MASK);
println!("DFSR: {:03X}", DFSR.read());
println!("DataAbort");
slcr::RegisterBlock::unlocked(|slcr| slcr.soft_reset());
loop {}