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3 Commits
4439a64974
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9199bb7a16
Author | SHA1 | Date |
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Astro | 9199bb7a16 | |
Astro | da60be38b1 | |
Astro | 6c4b07e0cf |
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@ -28,7 +28,7 @@ const INST_WRDI: u8 = 0x04;
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/// Instruction: Write Enable
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/// Instruction: Write Enable
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const INST_WREN: u8 = 0x06;
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const INST_WREN: u8 = 0x06;
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/// Instruction: Program page
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/// Instruction: Program page
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const INST_PP: u8 = 02;
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const INST_PP: u8 = 0x02;
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/// Instruction: Sector Erase
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/// Instruction: Sector Erase
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const INST_SE: u8 = 0xD8;
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const INST_SE: u8 = 0xD8;
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/// Instruction: Erase 4K Block
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/// Instruction: Erase 4K Block
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@ -120,6 +120,7 @@ impl<MODE> Flash<MODE> {
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}
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}
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fn wait_tx_fifo_flush(&mut self) {
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fn wait_tx_fifo_flush(&mut self) {
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self.regs.config.modify(|_, w| w.man_start_com(true));
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while !self.regs.intr_status.read().tx_fifo_not_full() {}
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while !self.regs.intr_status.read().tx_fifo_not_full() {}
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}
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}
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}
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}
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@ -442,8 +443,7 @@ impl Flash<Manual> {
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pub fn program<I: Iterator<Item=u32>>(&mut self, offset: u32, data: I) {
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pub fn program<I: Iterator<Item=u32>>(&mut self, offset: u32, data: I) {
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{
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{
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let len = 4 + 4 * data.size_hint().0;
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let len = 4 + 4 * data.size_hint().0;
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let args = Some(SpiWord::W32(((INST_PP as u32) << 24) | (offset as u32)))
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let args = Some(SpiWord::W32(((INST_PP as u32) << 24) | (offset as u32))).into_iter()
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.into_iter()
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.chain(data.map(SpiWord::W32));
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.chain(data.map(SpiWord::W32));
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self.transfer(args, len);
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self.transfer(args, len);
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}
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}
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@ -47,7 +47,6 @@ impl<'a, Args: Iterator<Item = W>, W: Into<SpiWord>> Transfer<'a, Args, W> {
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_ => {
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_ => {
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if !self.flash.regs.intr_status.read().tx_fifo_not_full() {
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if !self.flash.regs.intr_status.read().tx_fifo_not_full() {
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// Flush if necessary
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// Flush if necessary
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self.flash.regs.config.modify(|_, w| w.man_start_com(true));
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self.flash.wait_tx_fifo_flush();
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self.flash.wait_tx_fifo_flush();
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}
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}
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@ -74,7 +73,6 @@ impl<'a, Args: Iterator<Item = W>, W: Into<SpiWord>> Transfer<'a, Args, W> {
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SpiWord::W32(_) => unreachable!(),
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SpiWord::W32(_) => unreachable!(),
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}
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}
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self.flash.regs.config.modify(|_, w| w.man_start_com(true));
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self.flash.wait_tx_fifo_flush();
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self.flash.wait_tx_fifo_flush();
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}
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}
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}
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}
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