libboard_zynq: fix flash read
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ab2a8db4d3
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c3ebafa6ed
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@ -22,7 +22,10 @@ pub const PAGE_SIZE: u32 = 0x100;
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/// Instruction: Read Identification
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const INST_RDID: u8 = 0x9F;
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/// Instruction: Read
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const INST_READ: u8 = 0x03;
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/// Instruction: Quad I/O Fast Read
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const INST_4IO_FAST_READ: u8 = 0xEB;
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/// Instruction: Write Disable
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const INST_WRDI: u8 = 0x04;
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/// Instruction: Write Enable
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@ -291,14 +294,14 @@ impl Flash<()> {
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self.regs.lqspi_cfg.write(regs::LqspiCfg::zeroed()
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// Quad I/O Fast Read
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.inst_code(0xEB)
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.inst_code(INST_4IO_FAST_READ)
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.dummy_mask(0x2)
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.mode_en(false)
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.mode_bits(0xFF)
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.dummy_byte(0x2)
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.mode_en(true)
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// 2 devices
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.two_mem(true)
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.u_page(false)
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// Linear Addressing Mode
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// Quad SPI mode
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.lq_mode(true)
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);
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@ -318,14 +321,15 @@ impl Flash<()> {
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);
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self.regs.lqspi_cfg.write(regs::LqspiCfg::zeroed()
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// Quad I/O Fast Read
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.inst_code(INST_READ)
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.dummy_mask(0x2)
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.mode_en(false)
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.mode_bits(0xFF)
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.dummy_byte(0x2)
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.mode_en(true)
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// 2 devices
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.two_mem(true)
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.sep_bus(true)
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.u_page(chip_index != 0)
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// Manual I/O mode
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.u_page(false)
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// Quad SPI mode
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.lq_mode(false)
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);
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@ -116,7 +116,7 @@ register_bit!(qspi_gpio,
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register!(lqspi_cfg, LqspiCfg, RW, u32);
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register_bits!(lqspi_cfg, inst_code, u8, 0, 7);
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register_bits!(lqspi_cfg, dummy_byte, u8, 8, 10);
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register_bits!(lqspi_cfg, dummy_mask, u8, 8, 10);
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register_bits!(lqspi_cfg, mode_bits, u8, 16, 23);
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register_bit!(lqspi_cfg, mode_on, 24);
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register_bit!(lqspi_cfg, mode_en, 25);
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