M-Labs/zynq-rs
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experiments: enabled L2 cache

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...and removed some trailing spaces
This commit is contained in:
pca006132 2020-08-20 11:57:47 +08:00
parent 7cb2669c3b
commit a1f859637a
1 changed files with 5 additions and 3 deletions
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2
experiments/src/main.rs
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@ -27,6 +27,7 @@ use libboard_zynq::{
}; };
use libcortex_a9::{ use libcortex_a9::{
mutex::Mutex, mutex::Mutex,
l2c::enable_l2_cache,
sync_channel::{Sender, Receiver}, sync_channel::{Sender, Receiver},
sync_channel, sync_channel,
regs::{MPIDR, SP}, regs::{MPIDR, SP},
@ -86,6 +87,7 @@ pub fn restart_core1() {
#[no_mangle] #[no_mangle]
pub fn main_core0() { pub fn main_core0() {
// zynq::clocks::CpuClocks::enable_io(1_250_000_000); // zynq::clocks::CpuClocks::enable_io(1_250_000_000);
enable_l2_cache();
println!("\nzc706 main"); println!("\nzc706 main");
let mut interrupt_controller = gic::InterruptController::gic(mpcore::RegisterBlock::mpcore()); let mut interrupt_controller = gic::InterruptController::gic(mpcore::RegisterBlock::mpcore());
interrupt_controller.enable_interrupts(); interrupt_controller.enable_interrupts();