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zynq::slcr: implement boot_mode bits

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Astro 2019-11-20 21:31:54 +01:00
parent 6ffcf7d4a4
commit 8037042040
1 changed files with 15 additions and 1 deletions
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16
src/zynq/slcr.rs
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@ -134,7 +134,7 @@ pub struct RegisterBlock {
pub rs_awdt_ctrl: RW<u32>, pub rs_awdt_ctrl: RW<u32>,
reserved6: [u32; 2], reserved6: [u32; 2],
pub reboot_status: RW<u32>, pub reboot_status: RW<u32>,
pub boot_mode: RW<u32>, pub boot_mode: BootMode,
reserved7: [u32; 40], reserved7: [u32; 40],
pub apu_ctrl: RW<u32>, pub apu_ctrl: RW<u32>,
pub wdt_clk_sel: RW<u32>, pub wdt_clk_sel: RW<u32>,
@ -447,6 +447,20 @@ register_bit!(a9_cpu_rst_ctrl, a9_clkstop0, 4);
register_bit!(a9_cpu_rst_ctrl, a9_rst1, 1); register_bit!(a9_cpu_rst_ctrl, a9_rst1, 1);
register_bit!(a9_cpu_rst_ctrl, a9_rst0, 0); register_bit!(a9_cpu_rst_ctrl, a9_rst0, 0);
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum BootModePins {
Jtag = 0b000,
Nor = 0b001,
Nand = 0b010,
QuadSpi = 0b100,
SdCard = 0b110,
}
register!(boot_mode, BootMode, RO, u32);
register_bit!(boot_mode, pll_bypass, 4);
register_bits_typed!(boot_mode, boot_mode_pins, u8, BootModePins, 0, 3);
register!(pss_rst_ctrl, PssRstCtrl, RW, u32); register!(pss_rst_ctrl, PssRstCtrl, RW, u32);
register_bit!(pss_rst_ctrl, soft_rst, 1); register_bit!(pss_rst_ctrl, soft_rst, 1);