M-Labs/zynq-rs
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szl: move enable l2c to artiq-zynq

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pca006132 2021-01-26 11:19:33 +08:00
parent b50540915d
commit 6e6612bc3e
1 changed files with 0 additions and 2 deletions
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szl/src/main.rs
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@ -20,7 +20,6 @@ use libconfig::{bootgen, sd_reader, Config};
use libcortex_a9::{ use libcortex_a9::{
asm::{dsb, isb}, asm::{dsb, isb},
cache::{bpiall, dcciall, iciallu}, cache::{bpiall, dcciall, iciallu},
l2c::enable_l2_cache,
}; };
use libregister::RegisterR; use libregister::RegisterR;
use libsupport_zynq::ram; use libsupport_zynq::ram;
@ -80,7 +79,6 @@ pub fn main_core0() {
"# "#
); );
info!("Simple Zynq Loader starting..."); info!("Simple Zynq Loader starting...");
enable_l2_cache();
const CPU_FREQ: u32 = 800_000_000; const CPU_FREQ: u32 = 800_000_000;