M-Labs/zynq-rs
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rm debug, delint

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This commit is contained in:
Astro 2019-09-29 03:01:24 +02:00
parent a76214cb9d
commit 4e9c38527e
4 changed files with 8 additions and 9 deletions
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11
src/eth/mod.rs
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@ -176,16 +176,17 @@ impl<'r> Eth<'r, (), ()> {
}; };
inner.init(); inner.init();
inner.configure(macaddr); inner.configure(macaddr);
let phy = Phy::find(&mut inner).expect("phy"); let phy = Phy::find(&mut inner).expect("phy");
phy.reset(&mut inner); phy.reset(&mut inner);
phy.restart_autoneg(&mut inner); phy.restart_autoneg(&mut inner);
let mut eth = Eth {
Eth {
rx: (), rx: (),
tx: (), tx: (),
inner, inner,
phy, phy,
}; }
eth
} }
} }
@ -341,7 +342,7 @@ impl<'r, 'rx, 'tx: 'a, 'a> smoltcp::phy::Device<'a> for &mut Eth<'r, rx::DescLis
fn receive(&'a mut self) -> Option<(Self::RxToken, Self::TxToken)> { fn receive(&'a mut self) -> Option<(Self::RxToken, Self::TxToken)> {
match self.rx.recv_next() { match self.rx.recv_next() {
Ok(Some(mut pktref)) => { Ok(Some(pktref)) => {
let tx_token = tx::Token { let tx_token = tx::Token {
regs: self.inner.regs, regs: self.inner.regs,
desc_list: &mut self.tx, desc_list: &mut self.tx,
@ -441,7 +442,7 @@ impl<'r> EthInner<'r> {
fn configure(&mut self, macaddr: [u8; 6]) { fn configure(&mut self, macaddr: [u8; 6]) {
let clocks = CpuClocks::get(); let clocks = CpuClocks::get();
let mut mdc_clk_div = (clocks.cpu_1x() / MAX_MDC) + 1; let mdc_clk_div = (clocks.cpu_1x() / MAX_MDC) + 1;
self.regs.net_cfg.write( self.regs.net_cfg.write(
regs::NetCfg::zeroed() regs::NetCfg::zeroed()

2
src/eth/rx.rs
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@ -124,7 +124,7 @@ impl<'a> Deref for PktRef<'a> {
} }
impl<'a> smoltcp::phy::RxToken for PktRef<'a> { impl<'a> smoltcp::phy::RxToken for PktRef<'a> {
fn consume<R, F>(mut self, _timestamp: smoltcp::time::Instant, f: F) -> smoltcp::Result<R> fn consume<R, F>(self, _timestamp: smoltcp::time::Instant, f: F) -> smoltcp::Result<R>
where where
F: FnOnce(&[u8]) -> smoltcp::Result<R> F: FnOnce(&[u8]) -> smoltcp::Result<R>
{ {

2
src/eth/tx.rs
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@ -1,6 +1,5 @@
use core::ops::{Deref, DerefMut}; use core::ops::{Deref, DerefMut};
use crate::{register, register_bit, register_bits, regs::*}; use crate::{register, register_bit, register_bits, regs::*};
use crate::println;
use super::{MTU, regs}; use super::{MTU, regs};
/// Descriptor entry /// Descriptor entry
@ -101,7 +100,6 @@ impl<'a> Drop for PktRef<'a> {
fn drop(&mut self) { fn drop(&mut self) {
self.entry.word1.modify(|_, w| w.used(false)); self.entry.word1.modify(|_, w| w.used(false));
if ! self.regs.tx_status.read().tx_go() { if ! self.regs.tx_status.read().tx_go() {
println!("tx start_tx");
self.regs.net_ctrl.modify(|_, w| self.regs.net_ctrl.modify(|_, w|
w.start_tx(true) w.start_tx(true)
); );

2
src/main.rs
View File

@ -88,7 +88,7 @@ fn main() {
clocks.cpu_2x() / 1_000_000, clocks.cpu_2x() / 1_000_000,
clocks.cpu_1x() / 1_000_000); clocks.cpu_1x() / 1_000_000);
let mut eth = eth::Eth::default(HWADDR.clone()); let eth = eth::Eth::default(HWADDR.clone());
println!("Eth on"); println!("Eth on");
const RX_LEN: usize = 2; const RX_LEN: usize = 2;